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[/] [dbg_interface/] [tags/] [rel_12/] - Rev 67

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Rev Log message Author Age Path
67 Lower two address lines must be always zero. simons 7591d 05h /dbg_interface/tags/rel_12/
65 WB_CNTL register added, some syncronization fixes. simons 7592d 04h /dbg_interface/tags/rel_12/
63 Three more chains added for cpu debug access. simons 7612d 05h /dbg_interface/tags/rel_12/
61 Lapsus fixed. simons 7640d 05h /dbg_interface/tags/rel_12/
59 Reset value for riscsel register set to 1. simons 7640d 05h /dbg_interface/tags/rel_12/
57 Multiple cpu support added. simons 7640d 07h /dbg_interface/tags/rel_12/
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7907d 03h /dbg_interface/tags/rel_12/
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7907d 03h /dbg_interface/tags/rel_12/
53 Trst active high. Inverted on higher layer. mohor 7907d 05h /dbg_interface/tags/rel_12/
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7907d 05h /dbg_interface/tags/rel_12/
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7934d 16h /dbg_interface/tags/rel_12/
50 Revision 1.5 of the document ready. WISHBONE Scan Chain changed. mohor 7934d 17h /dbg_interface/tags/rel_12/
47 mon_cntl_o signals that controls monitor mux added. mohor 8090d 04h /dbg_interface/tags/rel_12/
46 Asynchronous reset used instead of synchronous. mohor 8098d 10h /dbg_interface/tags/rel_12/
45 tdo_padoen_o changed to tdo_padoe_o. Signal is active high. mohor 8105d 06h /dbg_interface/tags/rel_12/
44 Signal names changed to lower case. mohor 8105d 06h /dbg_interface/tags/rel_12/
43 Intentional error removed. mohor 8110d 06h /dbg_interface/tags/rel_12/
42 A block for checking possible simulation/synthesis missmatch added. mohor 8110d 08h /dbg_interface/tags/rel_12/
41 Function changed to logic because of some synthesis warnings. mohor 8118d 05h /dbg_interface/tags/rel_12/
40 Signal tdo_padoe_o changed back to tdo_padoen_o. mohor 8132d 05h /dbg_interface/tags/rel_12/

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