URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_16/] [bench/] - Rev 158

Rev	Log message	Author	Age	Path
158		root	5562d 18h	/dbg_interface/tags/rel_16/bench/
118	This commit was manufactured by cvs2svn to create tag 'rel_16'.		7438d 23h	/dbg_interface/tags/rel_16/bench/
117	Define name changed.	mohor	7438d 23h	/dbg_interface/tags/rel_16/bench/
116	Data latching changed when testing WB.	mohor	7439d 00h	/dbg_interface/tags/rel_16/bench/
115	More debug data added.	mohor	7439d 03h	/dbg_interface/tags/rel_16/bench/
114	CRC generation iand verification in bench changed.	mohor	7439d 05h	/dbg_interface/tags/rel_16/bench/
113	IDCODE test improved.	mohor	7439d 06h	/dbg_interface/tags/rel_16/bench/
112	dbg_tb_defines.v not used.	mohor	7440d 00h	/dbg_interface/tags/rel_16/bench/
111	Define tap_defines.v added to test bench.	mohor	7440d 01h	/dbg_interface/tags/rel_16/bench/
110	Waiting for "ready" improved.	mohor	7440d 01h	/dbg_interface/tags/rel_16/bench/
102	New version.	mohor	7441d 20h	/dbg_interface/tags/rel_16/bench/
101	Almost finished.	mohor	7441d 21h	/dbg_interface/tags/rel_16/bench/
99	cpu registers added.	mohor	7442d 23h	/dbg_interface/tags/rel_16/bench/
96	Working.	mohor	7444d 03h	/dbg_interface/tags/rel_16/bench/
95	Temp version.	mohor	7444d 15h	/dbg_interface/tags/rel_16/bench/
93	tmp version.	mohor	7446d 02h	/dbg_interface/tags/rel_16/bench/
92	temp version.	mohor	7449d 06h	/dbg_interface/tags/rel_16/bench/
91	tmp version.	mohor	7450d 01h	/dbg_interface/tags/rel_16/bench/
90	tmp version.	mohor	7450d 20h	/dbg_interface/tags/rel_16/bench/
89	temp4 version.	mohor	7452d 02h	/dbg_interface/tags/rel_16/bench/