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[/] [dbg_interface/] [tags/] [rel_19/] - Rev 82

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Rev Log message Author Age Path
82 New directory structure. New version of the debug interface. mohor 7511d 08h /dbg_interface/tags/rel_19/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7511d 08h /dbg_interface/tags/rel_19/
80 New version of the debug interface. Not finished, yet. mohor 7511d 09h /dbg_interface/tags/rel_19/
77 MBIST chain connection fixed. mohor 7572d 05h /dbg_interface/tags/rel_19/
75 Simulation files. mohor 7572d 07h /dbg_interface/tags/rel_19/
74 Removed. mohor 7572d 07h /dbg_interface/tags/rel_19/
73 CRC logic changed. mohor 7572d 07h /dbg_interface/tags/rel_19/
71 Mbist support added. simons 7574d 14h /dbg_interface/tags/rel_19/
70 A pdf copy of existing doc document. simons 7581d 16h /dbg_interface/tags/rel_19/
69 WBCNTL added, multiple CPU support described. simons 7602d 05h /dbg_interface/tags/rel_19/
67 Lower two address lines must be always zero. simons 7607d 09h /dbg_interface/tags/rel_19/
65 WB_CNTL register added, some syncronization fixes. simons 7608d 09h /dbg_interface/tags/rel_19/
63 Three more chains added for cpu debug access. simons 7628d 10h /dbg_interface/tags/rel_19/
61 Lapsus fixed. simons 7656d 09h /dbg_interface/tags/rel_19/
59 Reset value for riscsel register set to 1. simons 7656d 10h /dbg_interface/tags/rel_19/
57 Multiple cpu support added. simons 7656d 11h /dbg_interface/tags/rel_19/
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7923d 07h /dbg_interface/tags/rel_19/
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7923d 08h /dbg_interface/tags/rel_19/
53 Trst active high. Inverted on higher layer. mohor 7923d 09h /dbg_interface/tags/rel_19/
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7923d 09h /dbg_interface/tags/rel_19/

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