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[/] [dbg_interface/] [tags/] [rel_19/] [rtl/] - Rev 81

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Rev Log message Author Age Path
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7492d 23h /dbg_interface/tags/rel_19/rtl/
77 MBIST chain connection fixed. mohor 7553d 20h /dbg_interface/tags/rel_19/rtl/
73 CRC logic changed. mohor 7553d 22h /dbg_interface/tags/rel_19/rtl/
71 Mbist support added. simons 7556d 05h /dbg_interface/tags/rel_19/rtl/
67 Lower two address lines must be always zero. simons 7589d 01h /dbg_interface/tags/rel_19/rtl/
65 WB_CNTL register added, some syncronization fixes. simons 7590d 00h /dbg_interface/tags/rel_19/rtl/
63 Three more chains added for cpu debug access. simons 7610d 01h /dbg_interface/tags/rel_19/rtl/
61 Lapsus fixed. simons 7638d 00h /dbg_interface/tags/rel_19/rtl/
59 Reset value for riscsel register set to 1. simons 7638d 01h /dbg_interface/tags/rel_19/rtl/
57 Multiple cpu support added. simons 7638d 02h /dbg_interface/tags/rel_19/rtl/
53 Trst active high. Inverted on higher layer. mohor 7905d 00h /dbg_interface/tags/rel_19/rtl/
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7905d 00h /dbg_interface/tags/rel_19/rtl/
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7932d 12h /dbg_interface/tags/rel_19/rtl/
47 mon_cntl_o signals that controls monitor mux added. mohor 8088d 00h /dbg_interface/tags/rel_19/rtl/
46 Asynchronous reset used instead of synchronous. mohor 8096d 06h /dbg_interface/tags/rel_19/rtl/
45 tdo_padoen_o changed to tdo_padoe_o. Signal is active high. mohor 8103d 02h /dbg_interface/tags/rel_19/rtl/
44 Signal names changed to lower case. mohor 8103d 02h /dbg_interface/tags/rel_19/rtl/
43 Intentional error removed. mohor 8108d 01h /dbg_interface/tags/rel_19/rtl/
42 A block for checking possible simulation/synthesis missmatch added. mohor 8108d 03h /dbg_interface/tags/rel_19/rtl/
41 Function changed to logic because of some synthesis warnings. mohor 8116d 00h /dbg_interface/tags/rel_19/rtl/

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