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[/] [dbg_interface/] [tags/] [rel_21/] - Rev 85

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Rev Log message Author Age Path
85 New directory structure. New debug interface. mohor 7526d 02h /dbg_interface/tags/rel_21/
84 Removed files that are not needed any more. mohor 7526d 02h /dbg_interface/tags/rel_21/
83 Small fix. mohor 7526d 02h /dbg_interface/tags/rel_21/
82 New directory structure. New version of the debug interface. mohor 7526d 02h /dbg_interface/tags/rel_21/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7526d 02h /dbg_interface/tags/rel_21/
80 New version of the debug interface. Not finished, yet. mohor 7526d 03h /dbg_interface/tags/rel_21/
77 MBIST chain connection fixed. mohor 7586d 23h /dbg_interface/tags/rel_21/
75 Simulation files. mohor 7587d 01h /dbg_interface/tags/rel_21/
74 Removed. mohor 7587d 01h /dbg_interface/tags/rel_21/
73 CRC logic changed. mohor 7587d 01h /dbg_interface/tags/rel_21/
71 Mbist support added. simons 7589d 07h /dbg_interface/tags/rel_21/
70 A pdf copy of existing doc document. simons 7596d 09h /dbg_interface/tags/rel_21/
69 WBCNTL added, multiple CPU support described. simons 7616d 23h /dbg_interface/tags/rel_21/
67 Lower two address lines must be always zero. simons 7622d 03h /dbg_interface/tags/rel_21/
65 WB_CNTL register added, some syncronization fixes. simons 7623d 03h /dbg_interface/tags/rel_21/
63 Three more chains added for cpu debug access. simons 7643d 03h /dbg_interface/tags/rel_21/
61 Lapsus fixed. simons 7671d 03h /dbg_interface/tags/rel_21/
59 Reset value for riscsel register set to 1. simons 7671d 03h /dbg_interface/tags/rel_21/
57 Multiple cpu support added. simons 7671d 05h /dbg_interface/tags/rel_21/
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7938d 01h /dbg_interface/tags/rel_21/

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