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[/] [dbg_interface/] [tags/] [rel_22/] - Rev 90

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Rev Log message Author Age Path
90 tmp version. mohor 7554d 15h /dbg_interface/tags/rel_22/
89 temp4 version. mohor 7555d 20h /dbg_interface/tags/rel_22/
88 temp3 version. mohor 7556d 15h /dbg_interface/tags/rel_22/
87 tmp2 version. mohor 7557d 20h /dbg_interface/tags/rel_22/
86 Tmp version. mohor 7570d 16h /dbg_interface/tags/rel_22/
85 New directory structure. New debug interface. mohor 7570d 17h /dbg_interface/tags/rel_22/
84 Removed files that are not needed any more. mohor 7570d 17h /dbg_interface/tags/rel_22/
83 Small fix. mohor 7570d 17h /dbg_interface/tags/rel_22/
82 New directory structure. New version of the debug interface. mohor 7570d 17h /dbg_interface/tags/rel_22/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7570d 17h /dbg_interface/tags/rel_22/
80 New version of the debug interface. Not finished, yet. mohor 7570d 18h /dbg_interface/tags/rel_22/
77 MBIST chain connection fixed. mohor 7631d 14h /dbg_interface/tags/rel_22/
75 Simulation files. mohor 7631d 16h /dbg_interface/tags/rel_22/
74 Removed. mohor 7631d 16h /dbg_interface/tags/rel_22/
73 CRC logic changed. mohor 7631d 16h /dbg_interface/tags/rel_22/
71 Mbist support added. simons 7633d 23h /dbg_interface/tags/rel_22/
70 A pdf copy of existing doc document. simons 7641d 01h /dbg_interface/tags/rel_22/
69 WBCNTL added, multiple CPU support described. simons 7661d 14h /dbg_interface/tags/rel_22/
67 Lower two address lines must be always zero. simons 7666d 18h /dbg_interface/tags/rel_22/
65 WB_CNTL register added, some syncronization fixes. simons 7667d 18h /dbg_interface/tags/rel_22/

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