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[/] [dbg_interface/] [tags/] [rel_6/] [sim/] [rtl_sim/] [run/] - Rev 36

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Rev Log message Author Age Path
36 Structure changed. Hooks for jtag chain added. mohor 8166d 15h /dbg_interface/tags/rel_6/sim/rtl_sim/run/
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8306d 19h /dbg_interface/tags/rel_6/sim/rtl_sim/run/
5 Trace fixed. Some registers changed, trace simplified. mohor 8337d 16h /dbg_interface/tags/rel_6/sim/rtl_sim/run/
2 Initial official release. mohor 8342d 16h /dbg_interface/tags/rel_6/sim/rtl_sim/run/

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