URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [trunk/] [rtl/] - Rev 158

Rev	Log message	Author	Age	Path
158		root	5570d 21h	/dbg_interface/trunk/rtl/
152	CTRL READ fixed. Stall bit was not shifted out OK. Error appeared in last check-in.	igorm	7368d 03h	/trunk/rtl/
150	Zero is shifted out when CTRL_READ command is active.	igorm	7368d 21h	/trunk/rtl/
147	CPU_WR_CTRL and CPU_RD_CTRL defines changed.	igorm	7371d 03h	/trunk/rtl/
146	Changes for the FormalPRO.	igorm	7375d 00h	/trunk/rtl/
144	Port names and defines for the supported CPUs changed.	igorm	7375d 05h	/trunk/rtl/
143	Signals for easier debugging removed.	igorm	7375d 07h	/trunk/rtl/
141	data_cnt_lim length changed to reduce number of warnings.	igorm	7376d 02h	/trunk/rtl/
139	New release of the debug interface (3rd. release).	igorm	7378d 20h	/trunk/rtl/
138	Temp version before changing dbg interface.	igorm	7385d 00h	/trunk/rtl/
128	Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are turned on.	mohor	7437d 07h	/trunk/rtl/
123	All flipflops are reset.	mohor	7442d 03h	/trunk/rtl/
121	Port signals are all set to zero after reset.	mohor	7445d 03h	/trunk/rtl/
119	cpu_stall_o activated as soon as bp occurs.	mohor	7445d 07h	/trunk/rtl/
117	Define name changed.	mohor	7447d 03h	/trunk/rtl/
108	Reset values width added because of FV, a good sentence changed because some tools can not handle it.	simons	7448d 09h	/trunk/rtl/
106	Sensitivity list updated.	simons	7449d 08h	/trunk/rtl/
104	cpu_tall_o is set with cpu_stb_o or register.	mohor	7449d 22h	/trunk/rtl/
102	New version.	mohor	7449d 23h	/trunk/rtl/
101	Almost finished.	mohor	7450d 00h	/trunk/rtl/