URL https://opencores.org/ocsvn/dblclockfft/dblclockfft/trunk

Subversion Repositories dblclockfft

[/] [dblclockfft/] [trunk/] [rtl/] - Rev 43

Rev	Log message	Author	Age	Path
43	Adjusted ignore properties	dgisselq	1911d 00h	/dblclockfft/trunk/rtl/
39	Updated Verilog, added window function demo	dgisselq	1911d 00h	/dblclockfft/trunk/rtl/
36	Added several new modes to the FFT This makes the FFT core generator a generator for a generic pipelined FFT--whether it be two samples per clock, one sample per clock, one sample per two clocks, or even one sample every three clocks. This version works in simulation, with some formal checks as well.	dgisselq	2170d 05h	/dblclockfft/trunk/rtl/