OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] - Rev 326

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
326 RAM simulation access times set to realistic values hellwig 3210d 14h /eco32/trunk/
325 memory speed measurement for new controller added hellwig 3219d 05h /eco32/trunk/
324 README updated hellwig 3219d 06h /eco32/trunk/
323 memspeed renamed to memspeed-1 hellwig 3219d 06h /eco32/trunk/
322 README updated, Makefile added hellwig 3219d 18h /eco32/trunk/
321 README updated hellwig 3219d 19h /eco32/trunk/
320 README updated hellwig 3220d 15h /eco32/trunk/
319 memory controller 2, FPGA realization hellwig 3220d 19h /eco32/trunk/
318 memory controller 1, FPGA realization hellwig 3220d 19h /eco32/trunk/
317 README updated hellwig 3221d 10h /eco32/trunk/
316 README added hellwig 3221d 13h /eco32/trunk/
315 README added hellwig 3221d 14h /eco32/trunk/
314 memory controller simulation 2 hellwig 3221d 16h /eco32/trunk/
313 memory controller simulation 1 hellwig 3221d 17h /eco32/trunk/
312 memory controller simulation 0 hellwig 3221d 18h /eco32/trunk/
311 README updated hellwig 3221d 19h /eco32/trunk/
310 verilated mc implementation with and without trace hellwig 3222d 16h /eco32/trunk/
309 multicycle simulation of ECO32, using Verilator hellwig 3223d 16h /eco32/trunk/
308 multicycle design, suitable for being verilated hellwig 3223d 20h /eco32/trunk/
307 several tests got duration.dat files hellwig 3224d 10h /eco32/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.