OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [fpga/] [mc/] - Rev 297

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
291 avoid timing violations in DDR RAM circuit, new .bit files generated hellwig 3269d 20h /eco32/trunk/fpga/mc/
290 Wishbone-compatible bus signals hellwig 3271d 21h /eco32/trunk/fpga/mc/
289 new directory structure within fpga hellwig 3272d 18h /eco32/trunk/fpga/mc/
288 new directory structure within fpga hellwig 3272d 18h /eco32/trunk/fpga/mc/
287 new directory structure within fpga hellwig 3272d 18h /eco32/trunk/fpga/mc/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.