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[/] [eco32/] [trunk/] [fpga/] [mc/] [src/] [cpu/] - Rev 290

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Rev Log message Author Age Path
290 Wishbone-compatible bus signals hellwig 3253d 08h /eco32/trunk/fpga/mc/src/cpu/
288 new directory structure within fpga hellwig 3254d 06h /eco32/trunk/fpga/mc/src/cpu/
204 changed TLB behavior on tbs instructions hellwig 3590d 11h /eco32/trunk/fpga/src/cpu/
181 hardware got BadAccess register; synthesizer result eco32.bit now included hellwig 3608d 07h /eco32/trunk/fpga/src/cpu/
120 hardware: in cpu/sregs change signal names di->din, do->dout hellwig 3764d 14h /eco32/trunk/fpga/src/cpu/
81 hardware: cpu now has a bad address register hellwig 3779d 16h /eco32/trunk/fpga/src/cpu/
75 hardware: cpu now equal to port-15 hellwig 3783d 06h /eco32/trunk/fpga/src/cpu/
27 fpga implementation unpacked hellwig 3789d 13h /eco32/trunk/fpga/src/cpu/

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