OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [fpga/] [mc/] [src/] [ram/] - Rev 290

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
290 Wishbone-compatible bus signals hellwig 3346d 05h /eco32/trunk/fpga/mc/src/ram/
288 new directory structure within fpga hellwig 3347d 03h /eco32/trunk/fpga/mc/src/ram/
219 organizing hardware hellwig 3670d 12h /eco32/trunk/fpga/src/ram/
126 hardware: ram pin ordering hellwig 3856d 11h /eco32/trunk/fpga/src/ram/
122 hardware: in sdramcntl.v signal added to sensitivity list hellwig 3857d 06h /eco32/trunk/fpga/src/ram/
119 hardware: ram now equivalent to port-15 hellwig 3857d 21h /eco32/trunk/fpga/src/ram/
27 fpga implementation unpacked hellwig 3882d 10h /eco32/trunk/fpga/src/ram/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.