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[/] [ethmac/] [branches/] [unneback/] - Rev 203

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Rev Log message Author Age Path
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.		 mohor 8018d 19h /ethmac/branches/unneback/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.		 mohor 8021d 20h /ethmac/branches/unneback/
201 Core size added to the document. mohor 8021d 21h /ethmac/branches/unneback/
200 File with lower case checked in instead. mohor 8021d 21h /ethmac/branches/unneback/
199 Datasheet name changed to lower case name. mohor 8021d 21h /ethmac/branches/unneback/
198 Removed file. File with name in lower case will be added instead. mohor 8021d 21h /ethmac/branches/unneback/
197 Ethernet Data Sheet. mohor 8021d 21h /ethmac/branches/unneback/
196 Ethernet product brief. mohor 8021d 22h /ethmac/branches/unneback/
195 Product brief removed because it is the same as Datasheet. mohor 8021d 22h /ethmac/branches/unneback/
194 Full duplex tests modified and testbench bug repaired. tadej 8021d 22h /ethmac/branches/unneback/
193 Temp version (backup). mohor 8022d 00h /ethmac/branches/unneback/
192 Some additional reports added tadej 8023d 19h /ethmac/branches/unneback/
191 Bug repaired in eth_phy device tadej 8023d 19h /ethmac/branches/unneback/
190 Several information added to the file. mohor 8023d 20h /ethmac/branches/unneback/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).		 mohor 8023d 20h /ethmac/branches/unneback/
188 PHY changed. tadej 8024d 17h /ethmac/branches/unneback/
187 _info file added. mohor 8024d 17h /ethmac/branches/unneback/
186 Macro for testbench (DO file). mohor 8024d 18h /ethmac/branches/unneback/
185 Directory keeper. mohor 8024d 18h /ethmac/branches/unneback/
184 Modelsim simulation environment should be ready now. mohor 8024d 18h /ethmac/branches/unneback/

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