URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_18/] [rtl/] - Rev 50

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
50	checks destination address for Unicast, Multicast and Broadcast ops	billditt	8163d 13h	/ethmac/tags/rel_18/rtl/
48	RxOverRun added to statuses.	mohor	8165d 16h	/ethmac/tags/rel_18/rtl/
47	HASH0 and HASH1 registers added. Registers address width was changed to 8 bits.	mohor	8165d 16h	/ethmac/tags/rel_18/rtl/
46	HASH0 and HASH1 registers added.	mohor	8165d 16h	/ethmac/tags/rel_18/rtl/
43	Tx status is written back to the BD.	mohor	8166d 23h	/ethmac/tags/rel_18/rtl/
42	Rx status is written back to the BD.	mohor	8169d 16h	/ethmac/tags/rel_18/rtl/
41	non-DMA host interface added. Select the right configutation in eth_defines.	mohor	8171d 18h	/ethmac/tags/rel_18/rtl/
40	Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200 MHz. Statuses, overrun, control frame transmission and reception still need to be fixed.	mohor	8172d 16h	/ethmac/tags/rel_18/rtl/
39	Tx part finished. TxStatus needs to be fixed. Pause request needs to be added.	mohor	8176d 20h	/ethmac/tags/rel_18/rtl/
38	Initial version. Equals to eth_wishbonedma.v at this moment.	mohor	8185d 22h	/ethmac/tags/rel_18/rtl/
37	Link in the header changed.	mohor	8185d 22h	/ethmac/tags/rel_18/rtl/
34	RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors instead of the number of RX descriptors).	mohor	8234d 18h	/ethmac/tags/rel_18/rtl/
33	ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead.	mohor	8234d 22h	/ethmac/tags/rel_18/rtl/
32	ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead.	mohor	8234d 22h	/ethmac/tags/rel_18/rtl/
29	Generic memory model is used. Defines are changed for the same reason.	mohor	8256d 18h	/ethmac/tags/rel_18/rtl/
24	Log file added.	mohor	8281d 21h	/ethmac/tags/rel_18/rtl/
23	Number of addresses (wb_adr_i) minimized.	mohor	8281d 21h	/ethmac/tags/rel_18/rtl/
22	eth_timescale.v changed to timescale.v This is done because of the simulation of the few cores in a one joined project.	mohor	8282d 00h	/ethmac/tags/rel_18/rtl/
21	Status signals changed, Adress decoding changed, interrupt controller added.	mohor	8282d 20h	/ethmac/tags/rel_18/rtl/
20	Defines changed (All precede with ETH_). Small changes because some tools generate warnings when two operands are together. Synchronization between two clocks domains in eth_wishbonedma.v is changed (due to ASIC demands).	mohor	8306d 18h	/ethmac/tags/rel_18/rtl/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_18/] [rtl/] - Rev 50

Filtering Options