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[/] [ethmac/] [tags/] [rel_21/] - Rev 126

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Rev	Log message	Author	Age	Path
126	InvalidSymbol generation changed.	mohor	8002d 16h	/ethmac/tags/rel_21/
125	RxAbort changed. Packets received with MRxErr (from PHY) are also aborted.	mohor	8002d 16h	/ethmac/tags/rel_21/
124	Define ETH_MIIMODER_RST corrected to 0x00000400.	mohor	8002d 17h	/ethmac/tags/rel_21/
122	ethernet spram added. So far a generic ram and xilinx RAMB4 are used.	mohor	8004d 17h	/ethmac/tags/rel_21/
121	gsr added for use when ETH_XILINX_RAMB4 define is set.	mohor	8004d 17h	/ethmac/tags/rel_21/
120	Unused files removed.	mohor	8004d 18h	/ethmac/tags/rel_21/
119	Ram , used for BDs changed from generic_spram to eth_spram_256x32.	mohor	8004d 18h	/ethmac/tags/rel_21/
118	ShiftEnded synchronization changed.	mohor	8008d 09h	/ethmac/tags/rel_21/
117	Clock mrx_clk set to 2.5 MHz.	mohor	8008d 20h	/ethmac/tags/rel_21/
116	Testing environment also includes traffic cop, memory interface and host interface.	mohor	8008d 20h	/ethmac/tags/rel_21/
115	RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset.	mohor	8009d 18h	/ethmac/tags/rel_21/
114	EXTERNAL_DMA removed. External DMA not supported.	mohor	8010d 15h	/ethmac/tags/rel_21/
113	RxPointer bug fixed.	mohor	8017d 07h	/ethmac/tags/rel_21/
112	Previous bug wasn't succesfully removed. Now fixed.	mohor	8017d 21h	/ethmac/tags/rel_21/
111	Master state machine had a bug when switching from master write to master read.	mohor	8018d 10h	/ethmac/tags/rel_21/
110	m_wb_cyc_o signal released after every single transfer.	mohor	8018d 13h	/ethmac/tags/rel_21/
109	Comment removed.	mohor	8018d 14h	/ethmac/tags/rel_21/
108	Testbench supports unaligned accesses.	mohor	8086d 00h	/ethmac/tags/rel_21/
107	TX_BUF_BASE changed.	mohor	8086d 00h	/ethmac/tags/rel_21/
106	Outputs registered. Reset changed for eth_wishbone module.	mohor	8086d 00h	/ethmac/tags/rel_21/

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Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_21/] - Rev 126

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