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Rev Log message Author Age Path
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8096d 00h /ethmac/tags/rel_4/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).		 mohor 8096d 00h /ethmac/tags/rel_4/
99 Document revised. mohor 8102d 23h /ethmac/tags/rel_4/
98 Document revised. mohor 8102d 23h /ethmac/tags/rel_4/
97 Small typo fixed. lampret 8119d 21h /ethmac/tags/rel_4/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.		 mohor 8123d 21h /ethmac/tags/rel_4/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.		 mohor 8124d 00h /ethmac/tags/rel_4/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.		 mohor 8124d 00h /ethmac/tags/rel_4/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8128d 22h /ethmac/tags/rel_4/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.		 mohor 8130d 01h /ethmac/tags/rel_4/
91 Comments in Slovene language removed. mohor 8130d 01h /ethmac/tags/rel_4/
90 casex changed with case, fifo reset changed. mohor 8130d 01h /ethmac/tags/rel_4/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8133d 23h /ethmac/tags/rel_4/
88 rx_fifo was not always cleared ok. Fixed. mohor 8139d 21h /ethmac/tags/rel_4/
87 Status was not latched correctly sometimes. Fixed. mohor 8140d 00h /ethmac/tags/rel_4/
86 Big Endian problem when sending frames fixed. mohor 8141d 07h /ethmac/tags/rel_4/
85 Log info was missing. mohor 8146d 16h /ethmac/tags/rel_4/
84 LinkFail signal was not latching appropriate bit. mohor 8146d 16h /ethmac/tags/rel_4/
83 MAC address recognition was not correct (bytes swaped). mohor 8146d 17h /ethmac/tags/rel_4/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8146d 18h /ethmac/tags/rel_4/

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