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39 Tx part finished. TxStatus needs to be fixed. Pause request needs to be
added.		 mohor 8156d 10h /ethmac/tags/rel_4/
38 Initial version. Equals to eth_wishbonedma.v at this moment. mohor 8165d 12h /ethmac/tags/rel_4/
37 Link in the header changed. mohor 8165d 12h /ethmac/tags/rel_4/
36 TX_BD_NUM register added instead of the RB_BD_ADDR. mohor 8211d 10h /ethmac/tags/rel_4/
35 RX_BD_NUM changed to TX_BD_NUM. Few typos corrected. mohor 8214d 07h /ethmac/tags/rel_4/
34 RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
instead of the number of RX descriptors).		 mohor 8214d 07h /ethmac/tags/rel_4/
33 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8214d 12h /ethmac/tags/rel_4/
32 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8214d 12h /ethmac/tags/rel_4/
31 RX_BD_NUM register added instead of the RB_BD_ADDR. mohor 8214d 12h /ethmac/tags/rel_4/
30 BD section updated. mohor 8216d 09h /ethmac/tags/rel_4/
29 Generic memory model is used. Defines are changed for the same reason. mohor 8236d 08h /ethmac/tags/rel_4/
28 New release. Name changed to lower case. mohor 8238d 23h /ethmac/tags/rel_4/
27 File names changed to lower case. mohor 8238d 23h /ethmac/tags/rel_4/
26 First release of product brief. mohor 8239d 00h /ethmac/tags/rel_4/
25 First release of product brief. mohor 8239d 00h /ethmac/tags/rel_4/
24 Log file added. mohor 8261d 11h /ethmac/tags/rel_4/
23 Number of addresses (wb_adr_i) minimized. mohor 8261d 11h /ethmac/tags/rel_4/
22 eth_timescale.v changed to timescale.v This is done because of the
simulation of the few cores in a one joined project.		 mohor 8261d 14h /ethmac/tags/rel_4/
21 Status signals changed, Adress decoding changed, interrupt controller
added.		 mohor 8262d 10h /ethmac/tags/rel_4/
20 Defines changed (All precede with ETH_). Small changes because some
tools generate warnings when two operands are together. Synchronization
between two clocks domains in eth_wishbonedma.v is changed (due to ASIC
demands).		 mohor 8286d 07h /ethmac/tags/rel_4/

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