URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

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[/] [ethmac/] [trunk/] - Rev 343

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Rev	Log message	Author	Age	Path
343	Address miss should not be asserted on short frames	olof	4714d 04h	/ethmac/trunk/
342	Added cast to avoid inequality when comparing different data types	olof	4714d 04h	/ethmac/trunk/
341	Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short	olof	4714d 04h	/ethmac/trunk/
340	Don't fail if log dir already exists	olof	4715d 01h	/ethmac/trunk/
339	Added basic support for Icarus Verilog	olof	4716d 01h	/ethmac/trunk/
338		root	5508d 06h	/ethmac/trunk/
335	New directory structure.	root	5565d 12h	/ethernet/trunk/
334	Minor fixes for Icarus simulator.	igorm	7013d 14h	/trunk/
333	Some small fixes + some troubles fixed.	igorm	7014d 02h	/trunk/
332	Case statement improved for synthesys.	igorm	7027d 07h	/trunk/
331	Tests for delayed CRC and defer indication added.	igorm	7042d 09h	/trunk/
330	Warning fixes.	igorm	7042d 09h	/trunk/
329	Defer indication fixed.	igorm	7042d 10h	/trunk/
328	Delayed CRC fixed.	igorm	7042d 10h	/trunk/
327	Defer indication fixed.	igorm	7042d 10h	/trunk/
326	Delayed CRC fixed.	igorm	7042d 11h	/trunk/
325	Defer indication fixed.	igorm	7042d 11h	/trunk/
323	Accidently deleted line put back.	igorm	7339d 11h	/trunk/
321	- Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the previous update of the core. - TxBDAddress is set to 0 after the TX is enabled in the MODER register. - RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER register. (thanks to Mathias and Torbjorn) - Multicast reception was fixed. Thanks to Ulrich Gries	igorm	7343d 06h	/trunk/
320	TX_BD_NUM_Wr error fixed. Error was entered with the last check-in.	igorm	7343d 10h	/trunk/

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[/] [ethmac/] [trunk/] - Rev 343

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