URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [sim/] - Rev 308

Rev	Log message	Author	Age	Path
308	Moved RAM model file path from sim_file_list.lst to this file.	tadejm	7640d 01h	/ethmac/trunk/sim/
299	Artisan RAMs added.	mohor	7747d 01h	/ethmac/trunk/sim/
295	Few minor changes.	tadejm	7754d 00h	/ethmac/trunk/sim/
294	Added path to a file with distributed RAM instances for xilinx.	tadejm	7756d 00h	/ethmac/trunk/sim/
293	initial.	tadejm	7779d 21h	/ethmac/trunk/sim/
292	Corrected mistake.	tadejm	7779d 21h	/ethmac/trunk/sim/
291	initial	tadejm	7779d 23h	/ethmac/trunk/sim/
290	Additional checking for FAILED tests added - for ATS.	tadejm	7780d 00h	/ethmac/trunk/sim/
225	Some minor changes.	tadejm	8052d 22h	/ethmac/trunk/sim/
224	Signals for a wave window in Modelsim.	tadejm	8052d 23h	/ethmac/trunk/sim/
217	Bist supported.	mohor	8060d 00h	/ethmac/trunk/sim/
215	Bist supported.	mohor	8060d 01h	/ethmac/trunk/sim/
208	Virtual Silicon RAMs moved to lib directory	tadej	8077d 18h	/ethmac/trunk/sim/
207	Virtual Silicon RAM support fixed	tadej	8077d 18h	/ethmac/trunk/sim/
206	Virtual Silicon RAM added to the simulation.	mohor	8077d 18h	/ethmac/trunk/sim/
205	ETH_VIRTUAL_SILICON_RAM supported.	mohor	8077d 19h	/ethmac/trunk/sim/
187	_info file added.	mohor	8083d 18h	/ethmac/trunk/sim/
186	Macro for testbench (DO file).	mohor	8083d 18h	/ethmac/trunk/sim/
185	Directory keeper.	mohor	8083d 19h	/ethmac/trunk/sim/
184	Modelsim simulation environment should be ready now.	mohor	8083d 19h	/ethmac/trunk/sim/