URL https://opencores.org/ocsvn/ethmac10g/ethmac10g/trunk

Subversion Repositories ethmac10g

[/] [ethmac10g/] [trunk/] [rtl/] [verilog/] - Rev 60

Rev	Log message	Author	Age	Path
60	change rxd_in, rxc_in and rxclk_in signals'name to xgmii_rxd, xgmii_rxc and xgmii_rxclk	fisher5090	6633d 12h	/ethmac10g/trunk/rtl/verilog/
59	first version	fisher5090	6633d 12h	/ethmac10g/trunk/rtl/verilog/
57	both inband fcs and no inband fcs are OK	fisher5090	6633d 18h	/ethmac10g/trunk/rtl/verilog/
56	no message	fisher5090	6634d 10h	/ethmac10g/trunk/rtl/verilog/
52	modified the rx_good_frame and rx_bad_frame timing sequence	fisher5090	6634d 14h	/ethmac10g/trunk/rtl/verilog/
51	modified	fisher5090	6636d 18h	/ethmac10g/trunk/rtl/verilog/
50	good version	fisher5090	6636d 18h	/ethmac10g/trunk/rtl/verilog/
41	no message	fisher5090	6639d 17h	/ethmac10g/trunk/rtl/verilog/
39	first version	fisher5090	6645d 16h	/ethmac10g/trunk/rtl/verilog/