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URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog/] - Rev 40

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Rev Log message Author Age Path
28 - allow restart of sqrt calc if load signal activated
-		 robfinch 1954d 05h /ft816float/trunk/rtl/verilog/
27 - transmission of Nans in normalizer robfinch 1975d 18h /ft816float/trunk/rtl/verilog/
26 - factor out sizes
- add leading bit for FMA normalization to normalizer		 robfinch 1976d 10h /ft816float/trunk/rtl/verilog/
25 - FMA improved accuracy robfinch 1979d 02h /ft816float/trunk/rtl/verilog/
24 - fix infinity robfinch 1979d 07h /ft816float/trunk/rtl/verilog/
23 - better test data for FMA robfinch 1979d 07h /ft816float/trunk/rtl/verilog/
22 - fused multiply add robfinch 1979d 10h /ft816float/trunk/rtl/verilog/
21 - trunc function robfinch 1979d 22h /ft816float/trunk/rtl/verilog/
20 - fix nan propagation robfinch 1981d 04h /ft816float/trunk/rtl/verilog/
19 - latency 10 addsub robfinch 1981d 05h /ft816float/trunk/rtl/verilog/
18 - sigmoid function robfinch 1982d 23h /ft816float/trunk/rtl/verilog/
16 - added reciprocal square root estimate robfinch 1982d 23h /ft816float/trunk/rtl/verilog/
15 - added reciprocal estimate robfinch 1984d 11h /ft816float/trunk/rtl/verilog/
14 - added Goldschmidt divider robfinch 2223d 09h /ft816float/trunk/rtl/verilog/
13 - fix sticky bit position robfinch 2466d 10h /ft816float/trunk/rtl/verilog/
12 - added square root robfinch 2468d 01h /ft816float/trunk/rtl/verilog/
11 - fix multiply NaN robfinch 2470d 01h /ft816float/trunk/rtl/verilog/
10 - fp updated
- test benches and vectors		 robfinch 2470d 12h /ft816float/trunk/rtl/verilog/
9 - added sample FP unit robfinch 2893d 12h /ft816float/trunk/rtl/verilog/
8 Updated better support for 80 bit / 128 bit ops robfinch 2893d 12h /ft816float/trunk/rtl/verilog/

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