URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog/] - Rev 80

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Rev	Log message	Author	Age	Path
63	- cntlz added cntlz192	robfinch	833d 07h	/ft816float/trunk/rtl/verilog/
61	- vtdl.v	robfinch	833d 09h	/ft816float/trunk/rtl/verilog/
28	- allow restart of sqrt calc if load signal activated -	robfinch	1793d 23h	/ft816float/trunk/rtl/verilog/
27	- transmission of Nans in normalizer	robfinch	1815d 12h	/ft816float/trunk/rtl/verilog/
26	- factor out sizes - add leading bit for FMA normalization to normalizer	robfinch	1816d 04h	/ft816float/trunk/rtl/verilog/
25	- FMA improved accuracy	robfinch	1818d 20h	/ft816float/trunk/rtl/verilog/
24	- fix infinity	robfinch	1819d 01h	/ft816float/trunk/rtl/verilog/
23	- better test data for FMA	robfinch	1819d 01h	/ft816float/trunk/rtl/verilog/
22	- fused multiply add	robfinch	1819d 03h	/ft816float/trunk/rtl/verilog/
21	- trunc function	robfinch	1819d 16h	/ft816float/trunk/rtl/verilog/
20	- fix nan propagation	robfinch	1820d 22h	/ft816float/trunk/rtl/verilog/
19	- latency 10 addsub	robfinch	1820d 23h	/ft816float/trunk/rtl/verilog/
18	- sigmoid function	robfinch	1822d 17h	/ft816float/trunk/rtl/verilog/
16	- added reciprocal square root estimate	robfinch	1822d 17h	/ft816float/trunk/rtl/verilog/
15	- added reciprocal estimate	robfinch	1824d 05h	/ft816float/trunk/rtl/verilog/
14	- added Goldschmidt divider	robfinch	2063d 03h	/ft816float/trunk/rtl/verilog/
13	- fix sticky bit position	robfinch	2306d 04h	/ft816float/trunk/rtl/verilog/
12	- added square root	robfinch	2307d 19h	/ft816float/trunk/rtl/verilog/
11	- fix multiply NaN	robfinch	2309d 18h	/ft816float/trunk/rtl/verilog/
10	- fp updated - test benches and vectors	robfinch	2310d 06h	/ft816float/trunk/rtl/verilog/

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Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog/] - Rev 80

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