URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] - Rev 47

Rev	Log message	Author	Age	Path
35	- additional pipelining in divider - radix4 primitive	robfinch	1555d 22h	/ft816float/trunk/rtl/verilog2/
34	- add pipeline stage in divider	robfinch	1556d 01h	/ft816float/trunk/rtl/verilog2/
33	- mult114 for FMA	robfinch	1808d 09h	/ft816float/trunk/rtl/verilog2/
32	- FMA, test bench for FMA	robfinch	1808d 09h	/ft816float/trunk/rtl/verilog2/
31	- preserve nan sign in addsub	robfinch	1808d 21h	/ft816float/trunk/rtl/verilog2/
30	- move load signal to bottom	robfinch	1824d 16h	/ft816float/trunk/rtl/verilog2/
29	- refactor with FPWID and EXTRA_BITS - Nan propagation	robfinch	1825d 00h	/ft816float/trunk/rtl/verilog2/