OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] - Rev 78

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
78 - BCD subtraction
- scaleb function		 robfinch 550d 23h /ft816float/trunk/rtl/verilog2/
76 - adjust 9 to 7 robfinch 552d 23h /ft816float/trunk/rtl/verilog2/
75 - add triple precision decimal float robfinch 553d 05h /ft816float/trunk/rtl/verilog2/
74 - added single precision combo logic only version of FMA robfinch 660d 22h /ft816float/trunk/rtl/verilog2/
73 - fix Karatsuba carry chain bug robfinch 831d 22h /ft816float/trunk/rtl/verilog2/
72 - fix: mult32x32 prod high order bits robfinch 832d 01h /ft816float/trunk/rtl/verilog2/
71 - added decimal float reciprocal estimate robfinch 839d 21h /ft816float/trunk/rtl/verilog2/
70 - fix carry out for BCD add / sub robfinch 840d 04h /ft816float/trunk/rtl/verilog2/
68 - added decimal float compare robfinch 844d 03h /ft816float/trunk/rtl/verilog2/
67 - adding decimal float divide robfinch 844d 06h /ft816float/trunk/rtl/verilog2/
66 - BCD arith additions robfinch 844d 09h /ft816float/trunk/rtl/verilog2/
65 -update dfdiv / dfmul robfinch 844d 09h /ft816float/trunk/rtl/verilog2/
64 - add multiply 128
- fix exponent bias		 robfinch 844d 09h /ft816float/trunk/rtl/verilog2/
62 - fix overflow status
- license comment		 robfinch 844d 22h /ft816float/trunk/rtl/verilog2/
60 - decimal float <-> int converters robfinch 844d 23h /ft816float/trunk/rtl/verilog2/
59 - bin to bcd and bcd to bin converters robfinch 845d 04h /ft816float/trunk/rtl/verilog2/
58 - generic redor robfinch 1106d 09h /ft816float/trunk/rtl/verilog2/
57 - decimal floating-point IEEE format encode/decode robfinch 1247d 21h /ft816float/trunk/rtl/verilog2/
56 - decimal square root function robfinch 1272d 22h /ft816float/trunk/rtl/verilog2/
55 - add storage format
- parameterization		 robfinch 1273d 14h /ft816float/trunk/rtl/verilog2/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.