URL https://opencores.org/ocsvn/gpio/gpio/trunk

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[/] [gpio/] [tags/] [asyst_3/] [rtl/] [verilog/] - Rev 26

Rev	Log message	Author	Age	Path
26	Removed zero padding as per Avi Shamli suggestion.	lampret	8115d 17h	/gpio/tags/asyst_3/rtl/verilog/
25	Ports changed per Ran Aviram suggestions.	lampret	8115d 17h	/gpio/tags/asyst_3/rtl/verilog/
24	Interrupt is asserted only when an input changes (code patch by Jacob Gorban)	lampret	8120d 11h	/gpio/tags/asyst_3/rtl/verilog/
23	Changed registered WISHBONE outputs wb_ack_o/wb_err_o to follow WB specification.	lampret	8173d 19h	/gpio/tags/asyst_3/rtl/verilog/
22	Fixed two typos.	lampret	8193d 21h	/gpio/tags/asyst_3/rtl/verilog/
21	Added RGPIO_INTS.	lampret	8193d 21h	/gpio/tags/asyst_3/rtl/verilog/
20	Fixing style.	lampret	8206d 18h	/gpio/tags/asyst_3/rtl/verilog/
19	Fixed bug when wb_inta_o is registered (GPIO_WB_REGISTERED_OUTPUTS)	lampret	8207d 07h	/gpio/tags/asyst_3/rtl/verilog/
17	Added GPIO_REGISTERED_WB_OUTPUTS, GPIO_REGISTERED_IO_OUTPUTS and GPIO_NO_NEGEDGE_FLOPS.	lampret	8234d 12h	/gpio/tags/asyst_3/rtl/verilog/
15	Fixed wb_err_o.	lampret	8249d 12h	/gpio/tags/asyst_3/rtl/verilog/
14	Changed top level ptc into gpio_top. Changed defines.v into gpio_defines.v.	lampret	8291d 19h	/gpio/tags/asyst_3/rtl/verilog/