OpenCores
URL https://opencores.org/ocsvn/gpio/gpio/trunk

Subversion Repositories gpio

[/] [gpio/] [tags/] [rel_15/] [rtl/] [verilog/] - Rev 52

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
52 ifndef directive is not supported by all tools. simons 7527d 11h /gpio/tags/rel_15/rtl/verilog/
36 bug fixed. all tests passed. gorand 7548d 05h /gpio/tags/rel_15/rtl/verilog/
34 added support for 8-bit access to registers. gorand 7552d 14h /gpio/tags/rel_15/rtl/verilog/
31 Bug fix. Interrupts were also asserted when condition was not met. lampret 7905d 06h /gpio/tags/rel_15/rtl/verilog/
29 Added ifdef to remove mux from clk_pad_i if mux is not allowed. This also removes RGPIO_CTRL[NEC]. lampret 7912d 07h /gpio/tags/rel_15/rtl/verilog/
27 negedge flops are enabled by default. lampret 8101d 10h /gpio/tags/rel_15/rtl/verilog/
26 Removed zero padding as per Avi Shamli suggestion. lampret 8155d 07h /gpio/tags/rel_15/rtl/verilog/
25 Ports changed per Ran Aviram suggestions. lampret 8155d 08h /gpio/tags/rel_15/rtl/verilog/
24 Interrupt is asserted only when an input changes (code patch by Jacob Gorban) lampret 8160d 01h /gpio/tags/rel_15/rtl/verilog/
23 Changed registered WISHBONE outputs wb_ack_o/wb_err_o to follow WB specification. lampret 8213d 09h /gpio/tags/rel_15/rtl/verilog/
22 Fixed two typos. lampret 8233d 11h /gpio/tags/rel_15/rtl/verilog/
21 Added RGPIO_INTS. lampret 8233d 11h /gpio/tags/rel_15/rtl/verilog/
20 Fixing style. lampret 8246d 08h /gpio/tags/rel_15/rtl/verilog/
19 Fixed bug when wb_inta_o is registered (GPIO_WB_REGISTERED_OUTPUTS) lampret 8246d 21h /gpio/tags/rel_15/rtl/verilog/
17 Added GPIO_REGISTERED_WB_OUTPUTS, GPIO_REGISTERED_IO_OUTPUTS and GPIO_NO_NEGEDGE_FLOPS. lampret 8274d 02h /gpio/tags/rel_15/rtl/verilog/
15 Fixed wb_err_o. lampret 8289d 02h /gpio/tags/rel_15/rtl/verilog/
14 Changed top level ptc into gpio_top. Changed defines.v into gpio_defines.v. lampret 8331d 10h /gpio/tags/rel_15/rtl/verilog/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.