OpenCores
URL https://opencores.org/ocsvn/gpio/gpio/trunk

Subversion Repositories gpio

[/] [gpio/] [trunk/] [rtl/] [verilog/] - Rev 56

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
56 added ECLK and NEC registers, all tests passed. gorand 7487d 06h /gpio/trunk/rtl/verilog/
52 ifndef directive is not supported by all tools. simons 7503d 02h /gpio/trunk/rtl/verilog/
36 bug fixed. all tests passed. gorand 7523d 20h /gpio/trunk/rtl/verilog/
34 added support for 8-bit access to registers. gorand 7528d 05h /gpio/trunk/rtl/verilog/
31 Bug fix. Interrupts were also asserted when condition was not met. lampret 7880d 20h /gpio/trunk/rtl/verilog/
29 Added ifdef to remove mux from clk_pad_i if mux is not allowed. This also removes RGPIO_CTRL[NEC]. lampret 7887d 21h /gpio/trunk/rtl/verilog/
27 negedge flops are enabled by default. lampret 8077d 01h /gpio/trunk/rtl/verilog/
26 Removed zero padding as per Avi Shamli suggestion. lampret 8130d 22h /gpio/trunk/rtl/verilog/
25 Ports changed per Ran Aviram suggestions. lampret 8130d 22h /gpio/trunk/rtl/verilog/
24 Interrupt is asserted only when an input changes (code patch by Jacob Gorban) lampret 8135d 15h /gpio/trunk/rtl/verilog/
23 Changed registered WISHBONE outputs wb_ack_o/wb_err_o to follow WB specification. lampret 8189d 00h /gpio/trunk/rtl/verilog/
22 Fixed two typos. lampret 8209d 02h /gpio/trunk/rtl/verilog/
21 Added RGPIO_INTS. lampret 8209d 02h /gpio/trunk/rtl/verilog/
20 Fixing style. lampret 8221d 22h /gpio/trunk/rtl/verilog/
19 Fixed bug when wb_inta_o is registered (GPIO_WB_REGISTERED_OUTPUTS) lampret 8222d 12h /gpio/trunk/rtl/verilog/
17 Added GPIO_REGISTERED_WB_OUTPUTS, GPIO_REGISTERED_IO_OUTPUTS and GPIO_NO_NEGEDGE_FLOPS. lampret 8249d 17h /gpio/trunk/rtl/verilog/
15 Fixed wb_err_o. lampret 8264d 16h /gpio/trunk/rtl/verilog/
14 Changed top level ptc into gpio_top. Changed defines.v into gpio_defines.v. lampret 8307d 00h /gpio/trunk/rtl/verilog/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.