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[/] [ha1588/] - Rev 45

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Rev	Log message	Author	Age	Path
45	1. optimized area, by removing unused registers. 2. optimized timing, by removing latches.	edn_walter	4476d 18h	/ha1588/
44	Updated TSU testbench.	edn_walter	4476d 21h	/ha1588/
43	Added software configurable PTP message id mask for TSU parser.	edn_walter	4477d 19h	/ha1588/
42	Updated RTC testbench. Shrunk 1s to 1us to simulate more cycles during a short time.	edn_walter	4478d 01h	/ha1588/
41	Added pre-adder to the accumulator to cut down critical timing path.	edn_walter	4478d 03h	/ha1588/
40	Release version 1.1	edn_walter	4478d 06h	/ha1588/
39	1. Added memory map and feature description. 2. Separated TX RX TSU register addresses.	edn_walter	4478d 06h	/ha1588/
38	1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c. 2. Added adj_done signal for CPU polling. 3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.	edn_walter	4479d 04h	/ha1588/
37	Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit	edn_walter	4479d 07h	/ha1588/
36	TSU testbench is now self-checking. Test result is reported at end of simulation.	edn_walter	4480d 02h	/ha1588/
35	Added support for stacked MPLS UDP/IPv4/IPv6 PTP packets.	edn_walter	4481d 01h	/ha1588/
34	Added LGPL file header to all copyrighted files.	edn_walter	4481d 04h	/ha1588/
33	Redefined memory map. RTC and TSU now have separate address spans, can be easily divided into to independent modules.	edn_walter	4481d 05h	/ha1588/
32	Added PTP standard time format output to the top module. Can be connected to external modules.	edn_walter	4481d 08h	/ha1588/
31	Added hand-shaking for the TSU data reading.	edn_walter	4482d 01h	/ha1588/
30	Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit	edn_walter	4482d 01h	/ha1588/
29	Added multicycle timing constraint to ptp_parser.v, which works at data rate of (32bit * 4 gmii_clk cycle). Fmax can exceed 250MHz.	edn_walter	4482d 01h	/ha1588/
28	Before changing TSU packet parser datapath width from 32b to 8b.	edn_walter	4482d 07h	/ha1588/
27	Added more bits to the TSU queue information, of which timestamp value is enlarged from 4s to 64s.	edn_walter	4482d 07h	/ha1588/
26	Updated test case.	edn_walter	4484d 02h	/ha1588/

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Subversion Repositories ha1588

[/] [ha1588/] - Rev 45

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