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[/] [ha1588/] [trunk/] - Rev 55

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55 Updated the SOPC Builder example with GMII/MII support. edn_walter 4577d 23h /ha1588/trunk/
54 Added support for MII interface as well as GMII interface. Updated unit and top-level test cases. edn_walter 4578d 00h /ha1588/trunk/
52 1. Corrected GMII BFM preamble+sfd size error: 4B 5555555d changed to 8B 5555555555555555d5.
2. Corrected packet parser 4B counter accordingly.		 edn_walter 4579d 22h /ha1588/trunk/
51 Making test case pass for SOPC simulation. edn_walter 4584d 08h /ha1588/trunk/
50 Added missing simulation library. edn_walter 4584d 09h /ha1588/trunk/
49 Added missing simulation library. edn_walter 4584d 17h /ha1588/trunk/
48 1. Added testbench for SOPC Builder example. Need to fully implement the self-check test cases. Just ignore the reported failures, and check the waveform for correct addressing.
2. Added GENERATE BLOCK for top-level addr_in unit selection. In normal top-level instantiation without modify the default addr_is_in_word = 0 parameter, the default address unit is in byte (8bit); When instantiated in SOPC Builder, the address unit is default to word (32bit).		 edn_walter 4584d 21h /ha1588/trunk/
47 Added test case of -16 negative period_adj value, to show the effect trying to set time backwards. Thanks to Frank Yang's question. edn_walter 4585d 08h /ha1588/trunk/
46 Added operation details to the memory map doc. Memory map should be interpreted with help of ptp_drv_bfm.c. edn_walter 4587d 23h /ha1588/trunk/
45 1. optimized area, by removing unused registers.
2. optimized timing, by removing latches.		 edn_walter 4588d 14h /ha1588/trunk/
44 Updated TSU testbench. edn_walter 4588d 17h /ha1588/trunk/
43 Added software configurable PTP message id mask for TSU parser. edn_walter 4589d 15h /ha1588/trunk/
42 Updated RTC testbench. Shrunk 1s to 1us to simulate more cycles during a short time. edn_walter 4589d 21h /ha1588/trunk/
41 Added pre-adder to the accumulator to cut down critical timing path. edn_walter 4589d 23h /ha1588/trunk/
39 1. Added memory map and feature description.
2. Separated TX RX TSU register addresses.		 edn_walter 4590d 02h /ha1588/trunk/
38 1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c.
2. Added adj_done signal for CPU polling.
3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.		 edn_walter 4591d 00h /ha1588/trunk/
37 Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit edn_walter 4591d 03h /ha1588/trunk/
36 TSU testbench is now self-checking. Test result is reported at end of simulation. edn_walter 4591d 22h /ha1588/trunk/
35 Added support for stacked MPLS UDP/IPv4/IPv6 PTP packets. edn_walter 4592d 21h /ha1588/trunk/
34 Added LGPL file header to all copyrighted files. edn_walter 4593d 00h /ha1588/trunk/

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