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[/] [ha1588/] [trunk/] [rtl/] - Rev 30

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Rev	Log message	Author	Age	Path
30	Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit	edn_walter	4559d 16h	/ha1588/trunk/rtl/
29	Added multicycle timing constraint to ptp_parser.v, which works at data rate of (32bit * 4 gmii_clk cycle). Fmax can exceed 250MHz.	edn_walter	4559d 16h	/ha1588/trunk/rtl/
27	Added more bits to the TSU queue information, of which timestamp value is enlarged from 4s to 64s.	edn_walter	4559d 22h	/ha1588/trunk/rtl/
25	Updated SOPC Builder component and example system.	edn_walter	4562d 16h	/ha1588/trunk/rtl/
24	Added test cases for top-level testbench to cover both RTC and TSU.	edn_walter	4562d 18h	/ha1588/trunk/rtl/
23	Added CDC hand-shaking for RTC time reading operation.	edn_walter	4563d 12h	/ha1588/trunk/rtl/
22	RTC reset will clear ACC counter, but not clear ACC counter incremental.	edn_walter	4563d 16h	/ha1588/trunk/rtl/
21	Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application.	edn_walter	4564d 12h	/ha1588/trunk/rtl/
20	Added SOPC Builder Component and Instantiation Example. Follow rtl/sopc/ReadMe.txt to add IP Search Path to SOPC Builder.	edn_walter	4568d 17h	/ha1588/trunk/rtl/
19	Added pipeline registers to Real Time Clock module to improve timing.	edn_walter	4568d 17h	/ha1588/trunk/rtl/
18	Added QuartusII Place and Route project for top level ha1588.v	edn_walter	4568d 17h	/ha1588/trunk/rtl/
17	Updated reg.v content.	edn_walter	4569d 10h	/ha1588/trunk/rtl/
16	Try to add sth.	edn_walter	4573d 03h	/ha1588/trunk/rtl/
15	Renamed module name for tsu and rtc. Added folder for reg and top. Added folder for sopc, preparing for Altera SOPC Builder customized component.	edn_walter	4575d 12h	/ha1588/trunk/rtl/
12	Added parser support for vlan tagged frames.	edn_walter	4579d 10h	/ha1588/trunk/rtl/
11	Added parser support for L2_PTP and IPv4/v6_UDP_PTP frame formats.	edn_walter	4580d 12h	/ha1588/trunk/rtl/
10	Added parser support for L2_PTP and IPv4_UDP_PTP frame formats.	edn_walter	4581d 12h	/ha1588/trunk/rtl/
9	Timestamp format in the queue = seqId_16bit + msgId_4bit + timeStamp1s_2bit + timeStamp1ns_30bit	edn_walter	4582d 11h	/ha1588/trunk/rtl/
8	Timestamp format in the queue = seqId_16bit + msgId_2bit + timeStamp_30bit	edn_walter	4582d 18h	/ha1588/trunk/rtl/
7	Reduced the timestamp length from 80b to 30b to save memory, since the software could be fast enough to handle timestamp rollover events per 1s. Enlarged the fifo depth to 15, to accomodate 10 ptp sync messages per 1s.	edn_walter	4582d 19h	/ha1588/trunk/rtl/

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[/] [ha1588/] [trunk/] [rtl/] - Rev 30

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