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[/] [ha1588/] [trunk/] [rtl/] - Rev 68

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Rev Log message Author Age Path
68 Refined the vendor specific IP instanttiation. Now DCFIFO is instantiated as a vendor specific IP in PAR directory. ash_riple 4252d 20h /ha1588/trunk/rtl/
67 Updated the WishBone IP top and Qsys IP top. ash_riple 4254d 13h /ha1588/trunk/rtl/
66 Added IP instantiation support for: QSys, XPS and WishBone. ash_riple 4255d 13h /ha1588/trunk/rtl/
65 Added WishBone compatible wrapper for register access. ash_riple 4259d 17h /ha1588/trunk/rtl/
58 Added output rtc_time_one_pps for clock accuracy measurement. 1PPS output is leading edge aligned with the PTP time output on boundary of 1s. edn_walter 4537d 16h /ha1588/trunk/rtl/
57 Added parameters of frame header constants for packet parsing. edn_walter 4537d 18h /ha1588/trunk/rtl/
56 Added parameter of VLAN TPID for stacked VLAN parsing. edn_walter 4537d 18h /ha1588/trunk/rtl/
55 Updated the SOPC Builder example with GMII/MII support. edn_walter 4538d 14h /ha1588/trunk/rtl/
54 Added support for MII interface as well as GMII interface. Updated unit and top-level test cases. edn_walter 4538d 15h /ha1588/trunk/rtl/
52 1. Corrected GMII BFM preamble+sfd size error: 4B 5555555d changed to 8B 5555555555555555d5.
2. Corrected packet parser 4B counter accordingly.		 edn_walter 4540d 13h /ha1588/trunk/rtl/
49 Added missing simulation library. edn_walter 4545d 09h /ha1588/trunk/rtl/
48 1. Added testbench for SOPC Builder example. Need to fully implement the self-check test cases. Just ignore the reported failures, and check the waveform for correct addressing.
2. Added GENERATE BLOCK for top-level addr_in unit selection. In normal top-level instantiation without modify the default addr_is_in_word = 0 parameter, the default address unit is in byte (8bit); When instantiated in SOPC Builder, the address unit is default to word (32bit).		 edn_walter 4545d 13h /ha1588/trunk/rtl/
45 1. optimized area, by removing unused registers.
2. optimized timing, by removing latches.		 edn_walter 4549d 06h /ha1588/trunk/rtl/
44 Updated TSU testbench. edn_walter 4549d 08h /ha1588/trunk/rtl/
43 Added software configurable PTP message id mask for TSU parser. edn_walter 4550d 06h /ha1588/trunk/rtl/
41 Added pre-adder to the accumulator to cut down critical timing path. edn_walter 4550d 14h /ha1588/trunk/rtl/
39 1. Added memory map and feature description.
2. Separated TX RX TSU register addresses.		 edn_walter 4550d 17h /ha1588/trunk/rtl/
38 1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c.
2. Added adj_done signal for CPU polling.
3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.		 edn_walter 4551d 15h /ha1588/trunk/rtl/
37 Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit edn_walter 4551d 18h /ha1588/trunk/rtl/
35 Added support for stacked MPLS UDP/IPv4/IPv6 PTP packets. edn_walter 4553d 12h /ha1588/trunk/rtl/

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