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[/] [ha1588/] [trunk/] [rtl/] [reg/] - Rev 29

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27 Added more bits to the TSU queue information, of which timestamp value is enlarged from 4s to 64s. edn_walter 4497d 20h /ha1588/trunk/rtl/reg/
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4500d 15h /ha1588/trunk/rtl/reg/
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 4501d 09h /ha1588/trunk/rtl/reg/
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4502d 10h /ha1588/trunk/rtl/reg/
18 Added QuartusII Place and Route project for top level ha1588.v edn_walter 4506d 14h /ha1588/trunk/rtl/reg/
17 Updated reg.v content. edn_walter 4507d 08h /ha1588/trunk/rtl/reg/
16 Try to add sth. edn_walter 4511d 01h /ha1588/trunk/rtl/reg/
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.
edn_walter 4513d 10h /ha1588/trunk/rtl/reg/

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