OpenCores
URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

[/] [ha1588/] [trunk/] [rtl/] [reg/] - Rev 29

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
27 Added more bits to the TSU queue information, of which timestamp value is enlarged from 4s to 64s. edn_walter 4473d 20h /ha1588/trunk/rtl/reg/
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4476d 16h /ha1588/trunk/rtl/reg/
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 4477d 10h /ha1588/trunk/rtl/reg/
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4478d 10h /ha1588/trunk/rtl/reg/
18 Added QuartusII Place and Route project for top level ha1588.v edn_walter 4482d 15h /ha1588/trunk/rtl/reg/
17 Updated reg.v content. edn_walter 4483d 08h /ha1588/trunk/rtl/reg/
16 Try to add sth. edn_walter 4487d 01h /ha1588/trunk/rtl/reg/
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.
edn_walter 4489d 10h /ha1588/trunk/rtl/reg/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.