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[/] [ha1588/] [trunk/] [sim/] - Rev 32

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32 Added PTP standard time format output to the top module. Can be connected to external modules. edn_walter 4472d 20h /ha1588/trunk/sim/
31 Added hand-shaking for the TSU data reading. edn_walter 4473d 13h /ha1588/trunk/sim/
30 Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit edn_walter 4473d 13h /ha1588/trunk/sim/
29 Added multicycle timing constraint to ptp_parser.v, which works at data rate of (32bit * 4 gmii_clk cycle). Fmax can exceed 250MHz. edn_walter 4473d 13h /ha1588/trunk/sim/
26 Updated test case. edn_walter 4475d 14h /ha1588/trunk/sim/
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4476d 15h /ha1588/trunk/sim/
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 4477d 09h /ha1588/trunk/sim/
22 RTC reset will clear ACC counter, but not clear ACC counter incremental. edn_walter 4477d 13h /ha1588/trunk/sim/
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4478d 09h /ha1588/trunk/sim/
19 Added pipeline registers to Real Time Clock module to improve timing. edn_walter 4482d 14h /ha1588/trunk/sim/
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.		 edn_walter 4489d 09h /ha1588/trunk/sim/
14 Added test case support for UDP/IPv6 PTP frames. edn_walter 4491d 09h /ha1588/trunk/sim/
13 Added test case support for single VLAN and double VLAN L2/L4 PTP frames. edn_walter 4492d 09h /ha1588/trunk/sim/
12 Added parser support for vlan tagged frames. edn_walter 4493d 07h /ha1588/trunk/sim/
11 Added parser support for L2_PTP and IPv4/v6_UDP_PTP frame formats. edn_walter 4494d 09h /ha1588/trunk/sim/
10 Added parser support for L2_PTP and IPv4_UDP_PTP frame formats. edn_walter 4495d 09h /ha1588/trunk/sim/
9 Timestamp format in the queue = seqId_16bit + msgId_4bit + timeStamp1s_2bit + timeStamp1ns_30bit edn_walter 4496d 08h /ha1588/trunk/sim/
8 Timestamp format in the queue = seqId_16bit + msgId_2bit + timeStamp_30bit edn_walter 4496d 15h /ha1588/trunk/sim/
7 Reduced the timestamp length from 80b to 30b to save memory, since the software could be fast enough to handle timestamp rollover events per 1s. Enlarged the fifo depth to 15, to accomodate 10 ptp sync messages per 1s. edn_walter 4496d 16h /ha1588/trunk/sim/
6 Reduced the size of the Vendor specific simulation library file. ash_riple 4498d 16h /ha1588/trunk/sim/

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