OpenCores
URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

[/] [ha1588/] [trunk/] [sim/] [top/] [ptp_drv_bfm/] - Rev 38

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
38 1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c.
2. Added adj_done signal for CPU polling.
3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.
edn_walter 4572d 10h /ha1588/trunk/sim/top/ptp_drv_bfm/
37 Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit edn_walter 4572d 13h /ha1588/trunk/sim/top/ptp_drv_bfm/
34 Added LGPL file header to all copyrighted files. edn_walter 4574d 10h /ha1588/trunk/sim/top/ptp_drv_bfm/
33 Redefined memory map. RTC and TSU now have separate address spans, can be easily divided into to independent modules. edn_walter 4574d 11h /ha1588/trunk/sim/top/ptp_drv_bfm/
31 Added hand-shaking for the TSU data reading. edn_walter 4575d 07h /ha1588/trunk/sim/top/ptp_drv_bfm/
26 Updated test case. edn_walter 4577d 08h /ha1588/trunk/sim/top/ptp_drv_bfm/
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4578d 09h /ha1588/trunk/sim/top/ptp_drv_bfm/
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 4579d 03h /ha1588/trunk/sim/top/ptp_drv_bfm/
22 RTC reset will clear ACC counter, but not clear ACC counter incremental. edn_walter 4579d 07h /ha1588/trunk/sim/top/ptp_drv_bfm/
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4580d 03h /ha1588/trunk/sim/top/ptp_drv_bfm/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.