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[/] [ha1588/] [trunk/] [sim/] [tsu/] - Rev 41

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38 1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c.
2. Added adj_done signal for CPU polling.
3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.		 edn_walter 4509d 09h /ha1588/trunk/sim/tsu/
37 Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit edn_walter 4509d 13h /ha1588/trunk/sim/tsu/
36 TSU testbench is now self-checking. Test result is reported at end of simulation. edn_walter 4510d 08h /ha1588/trunk/sim/tsu/
35 Added support for stacked MPLS UDP/IPv4/IPv6 PTP packets. edn_walter 4511d 07h /ha1588/trunk/sim/tsu/
34 Added LGPL file header to all copyrighted files. edn_walter 4511d 09h /ha1588/trunk/sim/tsu/
32 Added PTP standard time format output to the top module. Can be connected to external modules. edn_walter 4511d 13h /ha1588/trunk/sim/tsu/
30 Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit edn_walter 4512d 06h /ha1588/trunk/sim/tsu/
29 Added multicycle timing constraint to ptp_parser.v, which works at data rate of (32bit * 4 gmii_clk cycle). Fmax can exceed 250MHz. edn_walter 4512d 07h /ha1588/trunk/sim/tsu/
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.		 edn_walter 4528d 02h /ha1588/trunk/sim/tsu/
14 Added test case support for UDP/IPv6 PTP frames. edn_walter 4530d 02h /ha1588/trunk/sim/tsu/
13 Added test case support for single VLAN and double VLAN L2/L4 PTP frames. edn_walter 4531d 02h /ha1588/trunk/sim/tsu/
12 Added parser support for vlan tagged frames. edn_walter 4532d 01h /ha1588/trunk/sim/tsu/
11 Added parser support for L2_PTP and IPv4/v6_UDP_PTP frame formats. edn_walter 4533d 02h /ha1588/trunk/sim/tsu/
10 Added parser support for L2_PTP and IPv4_UDP_PTP frame formats. edn_walter 4534d 02h /ha1588/trunk/sim/tsu/
9 Timestamp format in the queue = seqId_16bit + msgId_4bit + timeStamp1s_2bit + timeStamp1ns_30bit edn_walter 4535d 02h /ha1588/trunk/sim/tsu/
8 Timestamp format in the queue = seqId_16bit + msgId_2bit + timeStamp_30bit edn_walter 4535d 08h /ha1588/trunk/sim/tsu/
7 Reduced the timestamp length from 80b to 30b to save memory, since the software could be fast enough to handle timestamp rollover events per 1s. Enlarged the fifo depth to 15, to accomodate 10 ptp sync messages per 1s. edn_walter 4535d 09h /ha1588/trunk/sim/tsu/
6 Reduced the size of the Vendor specific simulation library file. ash_riple 4537d 09h /ha1588/trunk/sim/tsu/
5 Added dcfifo to store ptp time stamps. ash_riple 4538d 01h /ha1588/trunk/sim/tsu/
4 Added source code and unit test for TSU. ash_riple 4539d 01h /ha1588/trunk/sim/tsu/

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