OpenCores
URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

[/] [ha1588/] [trunk/] [sim/] [tsu/] - Rev 74

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
68 Refined the vendor specific IP instanttiation. Now DCFIFO is instantiated as a vendor specific IP in PAR directory. ash_riple 4160d 10h /ha1588/trunk/sim/tsu/
63 Updated the simulation script under Linux. ash_riple 4172d 08h /ha1588/trunk/sim/tsu/
62 Removed environment variable settings in the simulation script under Windows. ash_riple 4172d 08h /ha1588/trunk/sim/tsu/
54 Added support for MII interface as well as GMII interface. Updated unit and top-level test cases. edn_walter 4446d 04h /ha1588/trunk/sim/tsu/
52 1. Corrected GMII BFM preamble+sfd size error: 4B 5555555d changed to 8B 5555555555555555d5.
2. Corrected packet parser 4B counter accordingly.		 edn_walter 4448d 02h /ha1588/trunk/sim/tsu/
44 Updated TSU testbench. edn_walter 4456d 22h /ha1588/trunk/sim/tsu/
43 Added software configurable PTP message id mask for TSU parser. edn_walter 4457d 20h /ha1588/trunk/sim/tsu/
38 1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c.
2. Added adj_done signal for CPU polling.
3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.		 edn_walter 4459d 05h /ha1588/trunk/sim/tsu/
37 Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit edn_walter 4459d 08h /ha1588/trunk/sim/tsu/
36 TSU testbench is now self-checking. Test result is reported at end of simulation. edn_walter 4460d 03h /ha1588/trunk/sim/tsu/
35 Added support for stacked MPLS UDP/IPv4/IPv6 PTP packets. edn_walter 4461d 02h /ha1588/trunk/sim/tsu/
34 Added LGPL file header to all copyrighted files. edn_walter 4461d 05h /ha1588/trunk/sim/tsu/
32 Added PTP standard time format output to the top module. Can be connected to external modules. edn_walter 4461d 09h /ha1588/trunk/sim/tsu/
30 Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit edn_walter 4462d 02h /ha1588/trunk/sim/tsu/
29 Added multicycle timing constraint to ptp_parser.v, which works at data rate of (32bit * 4 gmii_clk cycle). Fmax can exceed 250MHz. edn_walter 4462d 02h /ha1588/trunk/sim/tsu/
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.		 edn_walter 4477d 22h /ha1588/trunk/sim/tsu/
14 Added test case support for UDP/IPv6 PTP frames. edn_walter 4479d 22h /ha1588/trunk/sim/tsu/
13 Added test case support for single VLAN and double VLAN L2/L4 PTP frames. edn_walter 4480d 22h /ha1588/trunk/sim/tsu/
12 Added parser support for vlan tagged frames. edn_walter 4481d 20h /ha1588/trunk/sim/tsu/
11 Added parser support for L2_PTP and IPv4/v6_UDP_PTP frame formats. edn_walter 4482d 22h /ha1588/trunk/sim/tsu/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.