OpenCores
URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] - Rev 148

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
148 Added optional cache support to 'opcodes' test.
Updated simulation length accordingly.
ja_rd 4783d 08h /ion/
147 SW simulator updated to latest HW revision
(plus a few mistakes corrected: wrongly commented out lines, mostly)
ja_rd 4783d 08h /ion/
146 Added D-Cache setup code to 'adventure' bootstrap code
(redundant since common C startup code already does it but...)
ja_rd 4783d 09h /ion/
145 MAJOR UPDATE: first version of D-Cache ja_rd 4783d 09h /ion/
144 Added cache setup code to common startup code
Important: the new cache won't work without this
ja_rd 4783d 09h /ion/
143 'adventure' sample by default will log from 0xb0000000
and simulation length is now longer
ja_rd 4784d 23h /ion/
142 'Adventure' bootstrap code now enables the cache
(and runs noticeably faster on DE-1 board)
ja_rd 4784d 23h /ion/
141 BUG FIX in cache: cpu stall logic was missing key case
2nd SW in a (cached) row was not being stalled
ja_rd 4784d 23h /ion/
140 BUG FIX in cpu: MTCx was using Rs as source instead of Rt
BUG FIX in cpu: cached sequences of S* were failing, byte_we logic was wrong
ja_rd 4784d 23h /ion/
139 updated simulation & synthesis pre-generated entities
('hello' code sample)
ja_rd 4785d 17h /ion/
138 updated simulation & synthesis pre-generated entities
('hello' code sample)
ja_rd 4785d 17h /ion/
137 Updated TB2 for new cache interface ('unmapped' signal) ja_rd 4785d 17h /ion/
136 Added debug output to synthesizable MPU template, and connected debug signals to LEDs ja_rd 4785d 17h /ion/
135 Added debug output to synthesizable MPU template. ja_rd 4785d 17h /ion/
134 Added 'unmapped access' flag to CPU core, meant for debug mostly.
Eventually this flag will trigger an interrupt.
ja_rd 4785d 17h /ion/
133 First draft of the SDRAM controller
(Still unused in the code working base)
ja_rd 4788d 14h /ion/
132 Fixed bug in stall logic
(stall for back-to-back SW instructions was wrong)
ja_rd 4788d 15h /ion/
131 change to local system-dependent directory path ja_rd 4788d 15h /ion/
130 typo fix ja_rd 4788d 15h /ion/
129 updated pregenerated demo ('hello') ja_rd 4788d 15h /ion/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.