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Rev Log message Author Age Path
168 Updated 'opcodes' simulation script to NOT use simulated mips32 instructions and trap instead (as the real CPU does) ja_rd 4809d 04h /ion/
167 Updated simulation script for 'hello' sample: now uses function call log.
It is useless in this demo, but it shows how to use it.
ja_rd 4809d 06h /ion/
166 Modified simulator, added some debug functionality:
- Optional emulation of some MIPS32r2 opcodes
- Function call trace log using map file (crude implementation)

Plus a few small bug fixes
ja_rd 4809d 06h /ion/
165 Added (very early draft, very incomplete) reserved opcode trap handler.
Updated opcode tester to test some emulated mips32 opcodes using the trap handler.
ja_rd 4814d 14h /ion/
164 Minor typo fixes in source file ja_rd 4814d 14h /ion/
163 SW simulator update:
Better disassembly format (hastily tested)
New parameters: start address, breakpoint address, whether or not to trap reserved opcodes
ja_rd 4814d 15h /ion/
162 Fixed stupid mistake in headers (date of project) ja_rd 4815d 06h /ion/
161 Added GPL license info to the vhdl headers
This project is becoming respectable :)
ja_rd 4815d 06h /ion/
160 BUG FIX: the cache init code was messing the BSS initialization ja_rd 4816d 08h /ion/
159 bug detected but not fixed in cpu
(1st instruction after entering user mode is executed in kernel mode)
ja_rd 4816d 15h /ion/
158 removed file from TB directory which was committed by mistake ja_rd 4816d 15h /ion/
157 Bug fix in the missing coprocesor exception.
The CPU was triggering a privilege exception for the mtc0 that went into user mode.
Logging HDL updated
ja_rd 4818d 01h /ion/
156 project doc somewhat updated (but still out of date) ja_rd 4818d 08h /ion/
155 Temporary warning added to outdated project doc file ja_rd 4818d 09h /ion/
154 fixed log trigger address in hello makefile ja_rd 4818d 10h /ion/
153 Added R3000 compatible support for kernel/user state:
- Implemented KU/IE plus KUp/IEp and KUo/IEo status bits
- Updated startup and test code to account for changes
- Implemented bit DID NOT TEST rfe instruction (not used in code)
- Access to CP0 in user mode triggers 'CpU' trap
- Updated software simulator

Besides, the logging of HI/LO register changes has been temporarily disabled, there's an unfixed bug in it.
ja_rd 4818d 10h /ion/
152 Added R3000 compatible support for kernel/user state:
- Implemented KU/IE plus KUp/IEp and KUo/IEo status bits
- Updated startup and test code to account for changes
- Implemented bit DID NOT TEST rfe instruction (not used in code)
- Access to CP0 in user mode triggers 'CpU' trap
- Updated software simulator

Besides, the logging of HI/LO register changes has been temporarily disabled, there's an unfixed bug in it.
ja_rd 4818d 10h /ion/
151 BUG FIX: major bugs fixed in cache module
1.- sram address was wrong (leftover from previous version)
2.- writes to unmapped areas were blocking the cache
3.- Sequence SW,LW produced a RAW data hazard in some cases
ja_rd 4818d 10h /ion/
150 Bug fix: added missing nop in vacant branch delay slot ja_rd 4819d 08h /ion/
149 changed size of simulated flash in opcodes sample code ja_rd 4819d 08h /ion/

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