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[/] [ion/] [trunk/] - Rev 101

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Rev Log message Author Age Path
101 FIX: code_rd_vma asserted only after reset is done
ADDED cache control bits to CP0 status register
ADDED cache control outputs		 ja_rd 4845d 06h /ion/trunk/
100 Obsolete synthesizable template files removed ja_rd 4869d 15h /ion/trunk/
99 Obsolete TB template files removed ja_rd 4869d 15h /ion/trunk/
98 CPU rd and wr data address buses unified ja_rd 4869d 15h /ion/trunk/
97 CPU rd and wr data address buses unified ja_rd 4869d 15h /ion/trunk/
96 CPU rd and wr data address buses unified ja_rd 4869d 15h /ion/trunk/
95 BUG FIX: cache stub properly handles all kind of cycles now ja_rd 4880d 11h /ion/trunk/
94 Pregenerated demo 'hello' files updated ja_rd 4880d 11h /ion/trunk/
93 SW simulator supports 'log trigger address' and keyboard input as simulated UART RX.
Project parameters now launch adventure demo automatically		 ja_rd 4880d 11h /ion/trunk/
92 'hello' demo updated to use new startup files ja_rd 4880d 11h /ion/trunk/
91 FIX: startup files can now be used to run from FLASH or BRAM ja_rd 4880d 11h /ion/trunk/
90 Added 'Adventure' demo to be run from the DE-1 FLASH ja_rd 4880d 11h /ion/trunk/
89 Added startup and utility functions for 'bare metal' applications running from FLASH, plus linker file ja_rd 4880d 11h /ion/trunk/
88 Added UART RX interface to MPU template ja_rd 4880d 11h /ion/trunk/
87 Added UART RX interface to MPU template ja_rd 4880d 11h /ion/trunk/
86 Adapted TB template to use log trigger address ja_rd 4880d 11h /ion/trunk/
85 BUG FIX: log2 function was wrong ja_rd 4880d 11h /ion/trunk/
84 Added 'trigger address' for file logging to both the
vhdl TB and the python script		 ja_rd 4880d 11h /ion/trunk/
83 BUG FIX: LHU was not doing sign extension properly
BUG FIX: SLTIU decoding was wrong		 ja_rd 4880d 12h /ion/trunk/
82 bug fix: SLTI wasn't working properly in some cases ja_rd 4882d 12h /ion/trunk/

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