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Rev Log message Author Age Path
217 Removed another SoC file prematurely committed ja_rd 4403d 04h /ion/trunk/
216 First draft of SoC removed.
I'll rename it from mips_mcu in order to keep the svn log.
ja_rd 4403d 04h /ion/trunk/
215 First draft of MIPS SoC
Still unused by any of the code samples.
Eventually will replace the mips_mcu entity
ja_rd 4403d 04h /ion/trunk/
214 Updated pre-generated 'Hello' demo, recompiled and retested with the latest changes. ja_rd 4403d 12h /ion/trunk/
213 Memory test application updated -- added extra-simple D-Cache test.
The new test is a row of back-to-back I/O reads and writes.
This test triggers a bug in the cache that has been already fixed.
ja_rd 4403d 12h /ion/trunk/
212 BUG FIX: sequences of back-to-back I/O reads or writes didn't work.
The stall conditions were wrong for those cases.
Minor cleanup of the comments
ja_rd 4403d 12h /ion/trunk/
211 Included a simulated block of I/O regs in the test bench for easing some cache tests. ja_rd 4403d 12h /ion/trunk/
210 Added new Tex sources
New doc sources organized according to Tex guidelines
ja_rd 4583d 00h /ion/trunk/
209 Documentation reorganization
Updated PDF committed
Old Tex sources removed
Old plain text file removed
ja_rd 4583d 00h /ion/trunk/
208 Bug fix in SW simulator
Crashed when a function call trace log was requested with missing map file
ja_rd 4669d 06h /ion/trunk/
207 Simulation memories now modelled with shared variables and not signals.
This improves simulation speed of large programs (e.g. Adventure) by orders of magnitude
ja_rd 4682d 08h /ion/trunk/
206 Fixed SygnalSpy function calls for compatibility with older versions of Modelsim ja_rd 4682d 08h /ion/trunk/
205 Fixed bug in test bench interface to CPU ja_rd 4703d 07h /ion/trunk/
204 Bug fixed in simulation script (Thank you Khadijeh!) ja_rd 4703d 07h /ion/trunk/
203 Opcode test program prepared to test interrupts
(by using special simulated hardware in the test bench)
More changes to come, this is just the first commit of many
ja_rd 4717d 07h /ion/trunk/
202 Modelsim wave window script tidied up a bit
This is mostly useless anyway
ja_rd 4717d 07h /ion/trunk/
201 Minor fixes to code comments ja_rd 4717d 07h /ion/trunk/
200 CPU interrupt input changed to 8-bit vector
Other modules changed accordingly
Interrupts still missing; this is just preparing the interface
ja_rd 4717d 07h /ion/trunk/
199 Fixed missing references ja_rd 4718d 00h /ion/trunk/
198 Added new version of the project doc in LaTeX ja_rd 4718d 00h /ion/trunk/

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