OpenCores
URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] [trunk/] - Rev 229

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
229 Code samples updated to use new VHDL config packages and new SoC (UART). ja_rd 4521d 11h /ion/trunk/
228 SW simulator updated
Simulation of UART adapted to new hardware.
Added simulation of debug registers.
ja_rd 4521d 11h /ion/trunk/
227 Removed modules no longer used:
code_rom_pkg replaced by new package in SoC directory.
RS232 sub-modules replaced by new UART
ja_rd 4521d 11h /ion/trunk/
226 Updated demo and test bench to use new SoC entity. ja_rd 4521d 11h /ion/trunk/
225 Added utility functions for the initialization of BRAM memories. ja_rd 4521d 11h /ion/trunk/
224 MCU entity gutted and transformed into a SoC entity
Different UART, new generics...
ja_rd 4521d 12h /ion/trunk/
223 MCU entity renamed to SoC, moved to separate SoC directory ja_rd 4521d 12h /ion/trunk/
222 Documentation updated ja_rd 4521d 12h /ion/trunk/
221 Documentation updated ja_rd 4521d 12h /ion/trunk/
220 New script for configuration package generation.
New directory for all utility scripts
ja_rd 4521d 21h /ion/trunk/
219 Added windows binary for MIPS simulator 'slite' to the SVN repo, for convenience. ja_rd 4522d 04h /ion/trunk/
218 UART bug fix: rx_rdy flag must be clear only when reading the rx buffer ja_rd 4525d 11h /ion/trunk/
217 Removed another SoC file prematurely committed ja_rd 4532d 01h /ion/trunk/
216 First draft of SoC removed.
I'll rename it from mips_mcu in order to keep the svn log.
ja_rd 4532d 01h /ion/trunk/
215 First draft of MIPS SoC
Still unused by any of the code samples.
Eventually will replace the mips_mcu entity
ja_rd 4532d 02h /ion/trunk/
214 Updated pre-generated 'Hello' demo, recompiled and retested with the latest changes. ja_rd 4532d 10h /ion/trunk/
213 Memory test application updated -- added extra-simple D-Cache test.
The new test is a row of back-to-back I/O reads and writes.
This test triggers a bug in the cache that has been already fixed.
ja_rd 4532d 10h /ion/trunk/
212 BUG FIX: sequences of back-to-back I/O reads or writes didn't work.
The stall conditions were wrong for those cases.
Minor cleanup of the comments
ja_rd 4532d 10h /ion/trunk/
211 Included a simulated block of I/O regs in the test bench for easing some cache tests. ja_rd 4532d 10h /ion/trunk/
210 Added new Tex sources
New doc sources organized according to Tex guidelines
ja_rd 4711d 21h /ion/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.