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[/] [ion/] [trunk/] [src/] - Rev 168

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Rev	Log message	Author	Age	Path
168	Updated 'opcodes' simulation script to NOT use simulated mips32 instructions and trap instead (as the real CPU does)	ja_rd	4779d 16h	/ion/trunk/src/
167	Updated simulation script for 'hello' sample: now uses function call log. It is useless in this demo, but it shows how to use it.	ja_rd	4779d 18h	/ion/trunk/src/
165	Added (very early draft, very incomplete) reserved opcode trap handler. Updated opcode tester to test some emulated mips32 opcodes using the trap handler.	ja_rd	4785d 02h	/ion/trunk/src/
164	Minor typo fixes in source file	ja_rd	4785d 02h	/ion/trunk/src/
162	Fixed stupid mistake in headers (date of project)	ja_rd	4785d 18h	/ion/trunk/src/
161	Added GPL license info to the vhdl headers This project is becoming respectable :)	ja_rd	4785d 18h	/ion/trunk/src/
160	BUG FIX: the cache init code was messing the BSS initialization	ja_rd	4786d 20h	/ion/trunk/src/
154	fixed log trigger address in hello makefile	ja_rd	4788d 22h	/ion/trunk/src/
152	Added R3000 compatible support for kernel/user state: - Implemented KU/IE plus KUp/IEp and KUo/IEo status bits - Updated startup and test code to account for changes - Implemented bit DID NOT TEST rfe instruction (not used in code) - Access to CP0 in user mode triggers 'CpU' trap - Updated software simulator Besides, the logging of HI/LO register changes has been temporarily disabled, there's an unfixed bug in it.	ja_rd	4788d 22h	/ion/trunk/src/
150	Bug fix: added missing nop in vacant branch delay slot	ja_rd	4789d 20h	/ion/trunk/src/
149	changed size of simulated flash in opcodes sample code	ja_rd	4789d 20h	/ion/trunk/src/
148	Added optional cache support to 'opcodes' test. Updated simulation length accordingly.	ja_rd	4791d 11h	/ion/trunk/src/
146	Added D-Cache setup code to 'adventure' bootstrap code (redundant since common C startup code already does it but...)	ja_rd	4791d 12h	/ion/trunk/src/
144	Added cache setup code to common startup code Important: the new cache won't work without this	ja_rd	4791d 12h	/ion/trunk/src/
143	'adventure' sample by default will log from 0xb0000000 and simulation length is now longer	ja_rd	4793d 02h	/ion/trunk/src/
142	'Adventure' bootstrap code now enables the cache (and runs noticeably faster on DE-1 board)	ja_rd	4793d 02h	/ion/trunk/src/
137	Updated TB2 for new cache interface ('unmapped' signal)	ja_rd	4793d 20h	/ion/trunk/src/
135	Added debug output to synthesizable MPU template.	ja_rd	4793d 20h	/ion/trunk/src/
131	change to local system-dependent directory path	ja_rd	4796d 18h	/ion/trunk/src/
130	typo fix	ja_rd	4796d 18h	/ion/trunk/src/

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[/] [ion/] [trunk/] [src/] - Rev 168

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