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[/] [ion/] [trunk/] [src/] [memtest/] - Rev 229

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229 Code samples updated to use new VHDL config packages and new SoC (UART). ja_rd 4411d 16h /ion/trunk/src/memtest/
213 Memory test application updated -- added extra-simple D-Cache test.
The new test is a row of back-to-back I/O reads and writes.
This test triggers a bug in the cache that has been already fixed.
ja_rd 4422d 15h /ion/trunk/src/memtest/
197 Updated readme stuff for the code samples ja_rd 4738d 01h /ion/trunk/src/memtest/
193 Major test bench reorganization:
1.- TB now uses same object code as synthesizable demo.
2.- TB now simulates full MPU system.
3.- Console logging moved to TB package.
4.- Code sample makefiles and modelsim script updated accordingly.
ja_rd 4738d 02h /ion/trunk/src/memtest/
191 Separated object code stuff from mcu entity
Object code related stuff now lives in separate file
Makefiles for code samples updated accordingly
Old mcu template deprecated but still in place
ja_rd 4742d 11h /ion/trunk/src/memtest/
185 FIX: committed forgotten source file for 'memtest' demo...
Updated memtest makefile
ja_rd 4776d 23h /ion/trunk/src/memtest/
152 Added R3000 compatible support for kernel/user state:
- Implemented KU/IE plus KUp/IEp and KUo/IEo status bits
- Updated startup and test code to account for changes
- Implemented bit DID NOT TEST rfe instruction (not used in code)
- Access to CP0 in user mode triggers 'CpU' trap
- Updated software simulator

Besides, the logging of HI/LO register changes has been temporarily disabled, there's an unfixed bug in it.
ja_rd 4791d 12h /ion/trunk/src/memtest/
149 changed size of simulated flash in opcodes sample code ja_rd 4792d 10h /ion/trunk/src/memtest/
109 Updated memtest code sample:
- Initializes I-cache
- Tests execution from FLASH
- Uses small memory model for faster simulation
ja_rd 4854d 16h /ion/trunk/src/memtest/
106 SW samples updated:
- Added batch files for running the SW simulation
ja_rd 4858d 15h /ion/trunk/src/memtest/
90 Added 'Adventure' demo to be run from the DE-1 FLASH ja_rd 4898d 12h /ion/trunk/src/memtest/
78 Code sample 'memtest' adapted to test read from flash ja_rd 4908d 09h /ion/trunk/src/memtest/
66 Code samples:
Updated all code samples to use TB2 template and new memory map
ja_rd 4909d 02h /ion/trunk/src/memtest/
50 New code sample: memtest
Tests external RAM
ja_rd 4911d 08h /ion/trunk/src/memtest/

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