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Rev Log message Author Age Path
32 slite: catch 1-instruction endless loops
now can run unattended; will stop at the end of main()
ja_rd 5030d 17h /ion/trunk/tools/slite/src/
31 Major refactor in slite:
supports memory map with more than 1 block
indentation made homogeneous
unused code removed
ja_rd 5030d 17h /ion/trunk/tools/slite/src/
27 SW simulator updated: now supports CP0 cause register and traps in delay slots ja_rd 5032d 15h /ion/trunk/tools/slite/src/
16 SW simulator now shows HI and LO in status ja_rd 5034d 05h /ion/trunk/tools/slite/src/
11 SW signed multiplication simulation now lets compiler do the 64-bit arithmetic ja_rd 5034d 17h /ion/trunk/tools/slite/src/
7 Traps are now simulated as per MIPS specifications:
EPC point to victim instruction (break/syscall)
ja_rd 5035d 07h /ion/trunk/tools/slite/src/
5 SW simulator now logs failed assertions instead of quitting ja_rd 5035d 09h /ion/trunk/tools/slite/src/
2 First commit (includes 'hello' demo) ja_rd 5035d 19h /ion/trunk/tools/slite/src/

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