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[/] [ion/] [trunk/] [vhdl/] [demo/] - Rev 223

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Rev	Log message	Author	Age	Path
214	Updated pre-generated 'Hello' demo, recompiled and retested with the latest changes.	ja_rd	4443d 05h	/ion/trunk/vhdl/demo/
200	CPU interrupt input changed to 8-bit vector Other modules changed accordingly Interrupts still missing; this is just preparing the interface	ja_rd	4757d 00h	/ion/trunk/vhdl/demo/
193	Major test bench reorganization: 1.- TB now uses same object code as synthesizable demo. 2.- TB now simulates full MPU system. 3.- Console logging moved to TB package. 4.- Code sample makefiles and modelsim script updated accordingly.	ja_rd	4758d 16h	/ion/trunk/vhdl/demo/
191	Separated object code stuff from mcu entity Object code related stuff now lives in separate file Makefiles for code samples updated accordingly Old mcu template deprecated but still in place	ja_rd	4763d 01h	/ion/trunk/vhdl/demo/
188	updated hello demo mpu file	ja_rd	4771d 18h	/ion/trunk/vhdl/demo/
162	Fixed stupid mistake in headers (date of project)	ja_rd	4808d 22h	/ion/trunk/vhdl/demo/
161	Added GPL license info to the vhdl headers This project is becoming respectable :)	ja_rd	4808d 22h	/ion/trunk/vhdl/demo/
138	updated simulation & synthesis pre-generated entities ('hello' code sample)	ja_rd	4817d 00h	/ion/trunk/vhdl/demo/
136	Added debug output to synthesizable MPU template, and connected debug signals to LEDs	ja_rd	4817d 00h	/ion/trunk/vhdl/demo/
129	updated pregenerated demo ('hello')	ja_rd	4819d 22h	/ion/trunk/vhdl/demo/
119	Updated pre-generated simulation and synthesis demos	ja_rd	4875d 01h	/ion/trunk/vhdl/demo/
116	Updated demo 'top' file for DE-1 board - Added reset button debouncing - Added template for using different clock input - Uses clock rate generic	ja_rd	4875d 02h	/ion/trunk/vhdl/demo/
115	Updated Altera CSV file (pin location file) for DE-1 board (Added 27MHz clock input)	ja_rd	4875d 04h	/ion/trunk/vhdl/demo/
98	CPU rd and wr data address buses unified	ja_rd	4908d 05h	/ion/trunk/vhdl/demo/
94	Pregenerated demo 'hello' files updated	ja_rd	4919d 01h	/ion/trunk/vhdl/demo/
76	Adapted pregenerated vhdl files to latest changes	ja_rd	4928d 23h	/ion/trunk/vhdl/demo/
75	Added support for 8-bit-wide static memory (e.g. Flash) Updated demo 'top' file to use the DE-1 onboard flash	ja_rd	4928d 23h	/ion/trunk/vhdl/demo/
68	Updated pre-generated vhdl files	ja_rd	4929d 16h	/ion/trunk/vhdl/demo/
63	DE-1 demo top module: added registers for SD interface, switches and 7-seg display	ja_rd	4929d 16h	/ion/trunk/vhdl/demo/
59	cleaned up top vhdl module of demo moved reset sync ff chain to top module updated pre-generated demo file	ja_rd	4931d 05h	/ion/trunk/vhdl/demo/

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[/] [ion/] [trunk/] [vhdl/] [demo/] - Rev 223

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