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[/] [light8080/] [trunk/] [vhdl/] - Rev 81

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Rev	Log message	Author	Age	Path
80	Improved usability of SoC (memory size calculation) Added comments to SoC code. Fixed starter kit board simulation test bench, added uart loopback	ja_rd	4419d 19h	/light8080/trunk/vhdl/
79	DAA logic fixed and simplified	ja_rd	4419d 19h	/light8080/trunk/vhdl/
78	Fixed a number of errors in the last refactor of the VHDL side of the project: - Path errors in the simulation scripts. - The reset pin in the C2SB mini-test-bench was not being driven. - The main vhdl test bench file was missing entirely. All of these errors due to not properly verifying the commit...	ja_rd	4425d 20h	/light8080/trunk/vhdl/
77	Fixed a few mistakes in the last code reorganization. Mostly bad paths but also a broken comment in the UART source...	ja_rd	4426d 18h	/light8080/trunk/vhdl/
70	Added new VHDL SoC for demonstration purposes	ja_rd	4437d 02h	/light8080/trunk/vhdl/
64	BUG FIX: Flags CY and AC were not clear by logic instructions Added new flag to microcode: clr_acy Used new flag to clear AC and CY flags unconditonally Modified microcode for XR, OR and AN* to use new flag Modified microcode assembler to support new flag Addex explaination of new flag to documentation Old fix that worked only for XR* instructions removed Test bench tb0 modified to test CY clearance minimally (AC untested!) Pre-generated vhel test bench tb0 altered accordingly	ja_rd	4484d 05h	/light8080/trunk/vhdl/
61	Basic demo updated: main entity name changed to keep synthesis too happy	ja_rd	4852d 16h	/light8080/trunk/vhdl/
60	Fixed nasty typo in pin constraints file (clock input)	ja_rd	4856d 22h	/light8080/trunk/vhdl/
59	tabs to spaces	ja_rd	4881d 05h	/light8080/trunk/vhdl/
57	removed unfinished CPM demo files	ja_rd	5065d 19h	/light8080/trunk/vhdl/
55	Altair 4K Basic demo on DE-1 board	ja_rd	5065d 19h	/light8080/trunk/vhdl/
54	BUG FIX: XOR operations wre not clearing CY and ACY	ja_rd	5065d 19h	/light8080/trunk/vhdl/
53	added interrupt for single-stepping cleaned up comments a bit	ja_rd	5421d 19h	/light8080/trunk/vhdl/
50	interrupt test bench adapted to the fix in IE instruction	ja_rd	5421d 19h	/light8080/trunk/vhdl/
49	fixed: IE now enables interrupts after a 1-instruction delay (it was enabling interrupts immediately)	ja_rd	5421d 19h	/light8080/trunk/vhdl/
42	test bench 1 regenerated with new template added a test for 'long' intr pulses	ja_rd	5422d 11h	/light8080/trunk/vhdl/
41	test bench 0 regenerated with new template no changes to the test code	ja_rd	5422d 11h	/light8080/trunk/vhdl/
40	test bench template now can simulate intr pulses longer than 1 cycle	ja_rd	5422d 12h	/light8080/trunk/vhdl/
39	fixed: int request (intr) can now be wider than 1 cycle	ja_rd	5422d 12h	/light8080/trunk/vhdl/
38	pin assignment for IMSAI demo removed	ja_rd	5422d 12h	/light8080/trunk/vhdl/

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[/] [light8080/] [trunk/] [vhdl/] - Rev 81

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