URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

[/] [m1_core/] [trunk/] [hdl/] - Rev 59

Rev	Log message	Author	Age	Path
59	Fixed include paths	fafa1971	5481d 00h	/m1_core/trunk/hdl/
58		fafa1971	5481d 00h	/m1_core/trunk/hdl/
54	New directory structure.	root	5567d 14h	/m1_core/trunk/hdl/
51	Finally added unaligned loads and stores.	fafa1971	5613d 20h	/trunk/hdl/
50	Added handling of HALF and BYTE sizes in loads.	fafa1971	5613d 22h	/trunk/hdl/
49	* empty log message *	fafa1971	5613d 23h	/trunk/hdl/
48	Added proper carry generation inside ALU	fafa1971	5614d 00h	/trunk/hdl/
46	Added again System Configuration Registers to properly handle exceptions.	fafa1971	5616d 03h	/trunk/hdl/
44	New top-level for Spartan-3E Starter Kit	fafa1971	5690d 01h	/trunk/hdl/
43	New filelists	fafa1971	5690d 01h	/trunk/hdl/
36	Added new behavioral stuff for Wishbone peripherals	fafa1971	5690d 01h	/trunk/hdl/
35	New testbench with Wishbone peripherals	fafa1971	5690d 01h	/trunk/hdl/
34	Added all the new files for Wishbone peripherals	fafa1971	5690d 01h	/trunk/hdl/
33	Added files from Mistral's new world	fafa1971	5690d 02h	/trunk/hdl/
32	Moved files from m1_cpu to m1_core dir	fafa1971	5690d 02h	/trunk/hdl/
28	Changed NOR operator from (a~\|b) to ~(a\|b)	fafa1971	5775d 00h	/trunk/hdl/
27	Corrected problems with synthesis and removed system control registers	fafa1971	5780d 23h	/trunk/hdl/
26	Changed blocking / non-blocking assignments for MUL and DIV requests	fafa1971	5781d 00h	/trunk/hdl/
21	First revision (you should substitute '~' char with real path).	fafa1971	5787d 17h	/trunk/hdl/
20	Used only lower bits also for SRAV instruction.	fafa1971	5806d 05h	/trunk/hdl/