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[/] [m1_core/] [trunk/] [hdl/] [rtl/] - Rev 54

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Rev Log message Author Age Path
54 New directory structure. root 5586d 16h /m1_core/trunk/hdl/rtl/
51 Finally added unaligned loads and stores. fafa1971 5632d 22h /m1_core/trunk/hdl/rtl/
50 Added handling of HALF and BYTE sizes in loads. fafa1971 5632d 23h /m1_core/trunk/hdl/rtl/
49 *** empty log message *** fafa1971 5633d 01h /m1_core/trunk/hdl/rtl/
48 Added proper carry generation inside ALU fafa1971 5633d 02h /m1_core/trunk/hdl/rtl/
46 Added again System Configuration Registers to properly handle exceptions. fafa1971 5635d 05h /m1_core/trunk/hdl/rtl/
44 New top-level for Spartan-3E Starter Kit fafa1971 5709d 03h /m1_core/trunk/hdl/rtl/
34 Added all the new files for Wishbone peripherals fafa1971 5709d 03h /m1_core/trunk/hdl/rtl/
33 Added files from Mistral's new world fafa1971 5709d 03h /m1_core/trunk/hdl/rtl/
32 Moved files from m1_cpu to m1_core dir fafa1971 5709d 03h /m1_core/trunk/hdl/rtl/
28 Changed NOR operator from (a~|b) to ~(a|b) fafa1971 5794d 02h /m1_core/trunk/hdl/rtl/
27 Corrected problems with synthesis and removed system control registers fafa1971 5800d 01h /m1_core/trunk/hdl/rtl/
26 Changed blocking / non-blocking assignments for MUL and DIV requests fafa1971 5800d 01h /m1_core/trunk/hdl/rtl/
20 Used only lower bits also for SRAV instruction. fafa1971 5825d 07h /m1_core/trunk/hdl/rtl/
19 Added changes suggested by Paolo Piscopo & Simone Lunardo to fix the bugs they found. fafa1971 5835d 03h /m1_core/trunk/hdl/rtl/
18 Limited range of SHAMT (shift amount) to be only 5 bits ([4:0]) fafa1971 5835d 03h /m1_core/trunk/hdl/rtl/
16 Corrected some bugs found by Simone Lunardo and Paolo Piscopo. fafa1971 5879d 02h /m1_core/trunk/hdl/rtl/
15 Added default case for ALU. fafa1971 5879d 03h /m1_core/trunk/hdl/rtl/
7 It should not stay here! fafa1971 5972d 04h /m1_core/trunk/hdl/rtl/
6 Removed old CVS branches from CPU code. fafa1971 5972d 04h /m1_core/trunk/hdl/rtl/

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