OpenCores
URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

[/] [m1_core/] [trunk/] [hdl/] [rtl/] [m1_core/] - Rev 64

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
64 Change ownership albert.watson 2275d 01h /m1_core/trunk/hdl/rtl/m1_core/
61 Added branch_taken signal to correct the behavior of the unwanted double branch delay slot fafa1971 5380d 22h /m1_core/trunk/hdl/rtl/m1_core/
54 New directory structure. root 5562d 12h /m1_core/trunk/hdl/rtl/m1_core/
51 Finally added unaligned loads and stores. fafa1971 5608d 18h /m1_core/trunk/hdl/rtl/m1_core/
50 Added handling of HALF and BYTE sizes in loads. fafa1971 5608d 20h /m1_core/trunk/hdl/rtl/m1_core/
49 *** empty log message *** fafa1971 5608d 21h /m1_core/trunk/hdl/rtl/m1_core/
48 Added proper carry generation inside ALU fafa1971 5608d 22h /m1_core/trunk/hdl/rtl/m1_core/
46 Added again System Configuration Registers to properly handle exceptions. fafa1971 5611d 02h /m1_core/trunk/hdl/rtl/m1_core/
33 Added files from Mistral's new world fafa1971 5685d 00h /m1_core/trunk/hdl/rtl/m1_core/
2 First public release fafa1971 5948d 01h /m1_core/trunk/hdl/rtl/m1_core/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.